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SLOS385C – SEPTEMBER 2001 – REVISED SEPTEMBER 2010
Power-Down Reference Pin Operation
Printed-Circuit Board Layout Techniques for
Optimal Performance
In addition to the shutdown pin, the THS3115
features a reference pin (REF) which allows the user
Achieving optimum performance with high-frequency
to control the enable or disable power-down voltage
amplifiers such as the THS3115 and THS3112
levels applied to the SHUTDOWN pin. In most
requires careful attention to board layout parasitic and
split-supply
applications,
the
reference
pin
is
external component types. Recommendations that
connected to ground. In either case, the user needs
optimize performance include:
to be aware of voltage-level thresholds that apply to
Minimize parasitic capacitance to any ac ground
the shutdown pin.
Table 2 shows examples and
for all of the signal I/O pins. Parasitic capacitance
illustrate the relationship between the reference
on the output and input pins can cause instability.
voltage and the shutdown thresholds. In the table, the
To reduce unwanted capacitance, a window
threshold
levels
are
derived
by
the
following
around the signal I/O pins should be opened in all
equations:
of the ground and power planes around those
pins. Otherwise, ground and power planes should
SHUTDOWN
≤ REF + 0.8 V for enable
be unbroken elsewhere on the board.
SHUTDOWN
≥ REF + 2V for disable
Minimize the distance [0.25 inch, (6,4 mm)] from
Where the usable range at the REF pin is:
the power-supply pins to high-frequency 0.1-F
and 100-pF decoupling capacitors. At the device
VCC– ≤ VREF ≤ (VCC+ – 4V)
pins, the ground and power plane layout should
The recommended mode of operation is to tie the
not be in close proximity to the signal I/O pins.
REF
pin
to
midrail,
therefore
setting
the
Avoid
narrow
power
and
ground
traces
to
enable/disable thresholds to V(midrail) + 0.8 V and
minimize inductance between the pins and the
V(midrail) = 2 V, respectively.
decoupling
capacitors.
The
power-supply
connections should always be decoupled with
Table 2. Shutdown Threshold Voltage Levels
these
capacitors.
Larger
(6.8
F
or
more)
tantalum decoupling capacitors, effective at lower
REFERENCE
frequencies, should also be used on the main
SUPPLY
PIN
ENABLE
DISABLE
supply pins. These capacitors may be placed
VOLTAGE (V)
LEVEL (V)
somewhat farther from the device and may be
±15, ±5
0
0.8
2.0
shared among several devices in the same area
±15
2.0
2.8
4.0
of the printed circuit board (PCB).
±15
–2.0
–1.2
0
Careful
selection
and
placement
of
external
±5
1.0
1.8
3.0
components
preserve
the
high-frequency
±5
–1.0
–0.2
1.0
performance of the THS3115 and THS3112.
+30
15.0
15.8
17
Resistors should be a very low reactance type.
Surface-mount resistors work best and allow a
+10
5.0
5.8
7.0
tighter overall layout. Again, keep the leads and
PCB trace length as short as possible. Never use
Note that if the REF pin is left unterminated, it floats
wirebound type resistors in a high-frequency
to
the
positive
rail
and
falls
outside
of
the
application. Because the output pin and inverting
recommended operating range given above VCC– ≤
input pins are the most sensitive to parasitic
VREF ≤ (VCC+ – 4V). As a result, it no longer serves as
capacitance, always position the feedback and
a reliable reference for the SHUTDOWN pin, and the
series output resistors, if any, as close as possible
enable/disable thresholds given above no longer
to the inverting input pins and output pins. Other
apply.
If
the
SHUTDOWN
pin
is
also
left
network components, such as input termination
unterminated, it floats to the positive rail and the
resistors,
should
be
placed
close
to
the
device is disabled. If balanced, split supplies are used
gain-setting resistors. Even with a low parasitic
(±VCC) and the REF and SHUTDOWN pins are
capacitance that shunts the external resistors,
grounded, the device is enabled.
excessively
high
resistor
values
can
create
space
significant
time
constants
that
can
degrade
performance.
Good
axial
metal-film
or
space
surface-mount resistors have approximately 0.2
space
pF in shunt with the resistor. For resistor values
greater than 2.0 k
Ω, this parasitic capacitance can
add a pole and/or a zero that can affect circuit
operation.
Keep
resistor
values
as
low
as
possible,
consistent
with
load
driving
considerations.
Copyright 2001–2010, Texas Instruments Incorporated
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