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參數(shù)資料
| 型號(hào)： | THS1050C |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT DELTA-SIGMA ADC, PARALLEL ACCESS, PQFP48 |
| 封裝： | POWER, PLASTIC, TQFP-48 |
| 文件頁數(shù)： | 17/20頁 |
| 文件大?。?/td> | 397K |
| 代理商： | THS1050C |
THS1050
10-BIT 50 MSPS IF SAMPLING COMMUNICATIONS
ANALOG-TO-DIGITAL CONVERTER
SLAS278 – APRIL 2000
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
definitions of specifications
analog bandwidth
The analog input frequency at which the spectral power of the fundamental frequency of a large input signal
is reduced by 3 dB.
aperture delay
The delay between the 50% point of the rising edge of the clock and the instant at which the analog input is
sampled.
aperture uncertainity (jitter)
The sample-to-sample variation in aperture delay
differential nonlinearity
The average deviation of any output code from the ideal width of 1 LSB.
clock pulse width/duty cycle
Pulse width high is the minimum amount of time that the clock pulse should be left in logic 1 state to achieve
rated performance; pulse width low is the minimum time clock pulse should be left in low state. At a given clock
rate, these specs define acceptable clock duty cycles.
offset error
The difference between the analog input voltage at which the analog-to-digital converter output changes from
negative full scale, to one LSB above negative full scale, and the ideal voltage at which this transition should
occur.
gain error
The maximum error in LSBs between a digitized ideal full scale low frequency offset corrected triangle wave
analog input, from the ideal digitized full scale triangle wave, divided by the full scale range, in this case 1024.
harmonic distortion
The ratio of the power of the fundamental to a given harmonic component reported in dBc.
integral nonlinearity
The deviation of the transfer function from an end-point adjusted reference line measured in fractions of 1 LSB.
Also the integral of the DNL curve.
output delay
The delay between the 50% point of the falling edge of the clock and signal and the time when all output data
bits are within valid logic levels (not including pipeline delay).
signal-to-noise-and distortion (SINAD)
When tested with a single tone, the ratio of the signal power to the sum of the power of all other spectral
components, excluding dc, referenced to full scale.
signal-to-noise ratio (SNR)
When tested with a single tone, the ratio of the signal power to the sum of the power of all other power spectral
components, excluding dc and the first 9 harmonics, referenced to full scale.
effective number of bits (ENOB)
For a sine wave, SINAD can be expressed in terms of the effective number of bits, using the following formula,
ENOB
+
(SINAD
* 1.76)
6.02
spurious-free dynamic range (SFDR)
The ratio of the signal power to the power of the worst spur, excluding dc. The worst spurious component may
or may not be a harmonic. The ratio is reported in dBc (that is, degrades as signal levels are lowered).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| THS1050I | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT 50 MSPS IF SAMPLING COMMUNICATIONS ANALOG-TO-DIGITAL CONVERTER |
| THS1050IPHP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| THS1050PHP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT 50 MSPS IF SAMPLING COMMUNICATIONS ANALOG-TO-DIGITAL CONVERTER |
| THS1050RJ | 功能描述:線繞電阻器 - 底架安裝 50 Ohms 10W 50PPM RoHS:否 制造商:Vishay/Dale 電阻:7 Ohms 容差:1 % 功率額定值:100 W 溫度系數(shù):50 PPM / C 系列:RH 工作溫度范圍:- 55 C to + 250 C 尺寸:46.02 mm Dia. x 46.02 mm W x 88.9 mm L x 44.45 mm H 封裝:Bulk 產(chǎn)品:Power Resistors Wirewound Aluminum Housed |
| THS10-516R-D | 制造商:Thomas & Betts 功能描述:CATAMOUNT CABLE TIES |
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