參數(shù)資料
型號(hào)： THS1030IDWRG4
廠商： TEXAS INSTRUMENTS INC
元件分類： ADC
英文描述： 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝： PLASTIC, SOIC-28
文件頁(yè)數(shù)： 16/38頁(yè)
文件大?。?/td> 730K
代理商： THS1030IDWRG4
THS1030
3V TO 5.5V, 10BIT, 30 MSPS
CMOS ANALOGTODIGITAL CONVERTER
SLAS243E NOVEMBER 1999 REVISED DECEMBER 2003
23
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
power management
In power-sensitive applications (such as battery-powered systems) where the THS1030 ADC is not required
to convert continuously, power can be saved between conversion intervals by placing the THS1030 into
power-down mode. This is achieved by setting pin 17 (STBY) to 1. In power-down mode, the device typically
consumes less than 1 mW of power (from AVDD and DVDD) in either top/bottom mode or center-span mode.
On power up, the THS1030 typically requires 5 ms of wake-up time before valid conversion results are available
in either top/bottom or center span modes.
Disabling the ORG in applications where the ORG output is not required can also reduce power dissipation by
1 mA analog IDD. This is achieved by connecting the REFSENSE pin to AVDD.
output format and digital I/O
While the OE pin is held low, ADC conversion results are output at pins D0 (LSB) to D9 (MSB). The ADC input
over-range indicator is output at pin OVR. OVR is also disabled when OE is held high.
The ADC output data format is unsigned binary (output codes 0 to 1023).
driving the THS1030 analog inputs
driving AIN
Figure 26 shows an equivalent circuit for the THS1030 AIN pin. The load presented to the system at the AIN
pin comprises the switched input sampling capacitor, CSAMPLE, and various stray capacitances, CP1 and CP2.
C1
8 pF
AVDD
AGND
CLK
C2
1.2 pF
C(Sample)
VLAST
AIN
_
+
Figure 27. Equivalent Circuit of Analog Input AIN
In any single-ended input mode, VLAST = the average of the previously sampled voltage at AIN and the average
of the voltages on pins REFTS and REFBS. In any differential mode, VLAST = the common mode input voltage.
The external source driving AIN must be able to charge and settle into CSAMPLE and the CP1 and CP2 strays
to within 0.5 LSB error while sampling (CLK pin low) to achieve full ADC resolution.
相關(guān)PDF資料
PDF描述
THS1030IPWLE 10-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
THS1030CPWLE 10-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
THS1031CDWRG4 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
THS1031IDWRG4 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
THS1031CDWR 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
THS1030IPW 功能描述:模數(shù)轉(zhuǎn)換器 - ADC _ RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
THS1030IPWG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 30 MSPS 1-Ch Pin Comp RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
THS1030IPWR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 30 MSPS 1-Ch Pin Comp RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
THS1030IPWRG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 30 MSPS 1-Ch Pin Comp RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
THS1030SOIC 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V . 5.5 V, 10-BIT, 30 MSPS CMOS ANALOG-TO-DIGITAL CONVERTER
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