參數(shù)資料
型號: THS1030IDWR
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝: GREEN, PLASTIC, SOIC-28
文件頁數(shù): 5/37頁
文件大?。?/td> 727K
代理商: THS1030IDWR
THS1030
3V TO 5.5V, 10BIT, 30 MSPS
CMOS ANALOGTODIGITAL CONVERTER
SLAS243E NOVEMBER 1999 REVISED DECEMBER 2003
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
sample and hold
The analog input signal AIN is applied to the AIN pin, either dc-coupled or ac-coupled.
The differential sample and hold processes AIN with respect to the voltages applied to the REFTS and REFBS
pins, to give a differential output VP+ VP = VP given by:
VP
+ A
IN *
VM
Where:
VM
+
(REFTS
) REFBS)
2
For single-ended input signals, VM is a constant voltage; usually the AIN mid-scale input voltage. However if
MODE = AVDD/2 then REFTS and REFBS can be connected together to operate with AIN as a complementary
pair of differential inputs (see Figures 16 and 17).
analog-to-digital converter
In all operating configurations, VP is digitized against ADC reference voltages REFTF and REFBF, full-scale
values of VP being given by:
VPFS
)+
) (REFTF * REFBF)
2
VPFS
*+
* (REFTF * REFBF)
2
VP voltages outside the range VPFS to VPFS+ lie outside the conversion range of the ADC. Attempts to
convert out-of-range inputs are signaled to the application by driving the OVR output pin high. VP voltages less
than VPFS give ADC output code 0. VP voltages greater than VPFS+ give output code 1023.
complete system
Combining the above equations, the analog full scale input voltages at AIN which give VPFS+ and VPFS at
the sample and hold output are:
A
IN +
FS
)+ VM )
(REFTF
* REFBF)
2
and
A
IN +
FS
*+ VM *
(REFTF
* REFBF)
2
The analog input span (voltage range) that lies within the ADC conversion range is:
Input span
+ [(FS )) * (FS *)] + (REFTF * REFBF)
The REFTF and REFBF voltage difference sets the device input range. The next sections describe in detail the
various methods available for setting voltages REFTF and REFBF to obtain the desired input span and ADC
performance.
(1)
(2)
(3)
(4)
(5)
相關PDF資料
PDF描述
THS1030CPW 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
THS1030IPW 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
THS1030IDWG4 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
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相關代理商/技術參數(shù)
參數(shù)描述
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