參數(shù)資料
型號: THS1009IDA
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 2-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
封裝: GREEN, PLASTIC, TSSOP-32
文件頁數(shù): 8/30頁
文件大?。?/td> 294K
代理商: THS1009IDA
THS1009
SLAS287A – AUGUST 2000 – REVISED DECEMBER 2002
www.ti.com
16
DIGITAL OUTPUT DATA FORMAT
The digital output data format of the THS1009 can either be in binary format or in twos complement format. The
following tables list the digital outputs for the analog input voltages.
Table 2. Binary Output Format for Single-Ended Configuration
SINGLE-ENDED, BINARY OUTPUT
ANALOG INPUT VOLTAGE
DIGITAL OUTPUT CODE
AIN = VREFP
3FFh
AIN = (VREFP + VREFM)/2
200h
AIN = VREFM
000h
Table 3. Twos Complement Output Format for Single-Ended Configuration
SINGLE-ENDED, TWOS COMPLEMENT
ANALOG INPUT VOLTAGE
DIGITAL OUTPUT CODE
AIN = VREFP
1FFh
AIN = (VREFP + VREFM)/2
000h
AIN = VREFM
200h
Table 4. Binary Output Format for Differential Configuration
DIFFERENTIAL, BINARY OUTPUT
ANALOG INPUT VOLTAGE
DIGITAL OUTPUT CODE
Vin = AINP – AINM
VREF = VREFP – VREFM
Vin = VREF
3FFh
Vin = 0
200h
Vin = –VREF
000h
Table 5. Twos Complement Output Format for Differential Configuration
DIFFERENTIAL, BINARY OUTPUT
ANALOG INPUT VOLTAGE
DIGITAL OUTPUT CODE
Vin = AINP – AINM
VREF = VREFP – VREFM
Vin = VREF
1FFh
Vin = 0
000h
Vin = –VREF
200h
ADC CONTROL REGISTER
The THS1009 contains two 10-bit wide control registers (CR0, CR1) in order to program the device into the desired
mode. The bit definitions of both control registers are shown in Table 6.
Table 6. Bit Definitions of Control Register CR0 and CR1
REG
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
CR0
TEST1
TEST0
SCAN
DIFF1
DIFF0
CHSEL1
CHSEL0
PD
RES
VREF
CR1
RESERVED
OFFSET
BIN/2’s
R/W
RES
SRST
RESET
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