參數(shù)資料
型號: THS10064IDAG4
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
封裝: GREEN, PLASTIC, TSSOP-32
文件頁數(shù): 10/42頁
文件大小: 527K
代理商: THS10064IDAG4
THS10064
SLAS255B – DECEMBER 1999 – REVISED DECEMBER 2002
www.ti.com
18
Figure 29 shows the timing of continuous conversion mode when three analog input channels are selected. The
maximum throughput rate per channel is 2 MSPS in this mode. The data flow in the bottom of the figure shows in
which order the converted data is written into the FIFO. The timing of the DATA_AV signal shown here is for a trigger
level set to 3.
AIN
CONV_CLK
Data Into
FIFO
DATA_AV,
Trigger Level = 3
td(DATA_AV)
Sample N
Channel 1,2,3
Sample N+1
Channel 1,2,3
Sample N+2
Channel 1,2,3
td(O)
Data N–2
Channel 2
Data N–2
Channel 3
Data N–1
Channel 1
Data N–1
Channel 2
Data N–1
Channel 3
Data N
Channel 1
Data N
Channel 2
Data N
Channel 3
tc
td(A)
tw(CONV_CLKH)
tw(CONV_CLKL)
td(Pipe)
50%
Figure 29. Timing of Continuous Conversion Mode (3-channel operation)
Figure 30 shows the timing of continuous conversion mode when four analog input channels are selected. The
maximum throughput rate per channel is 1.5 MSPS in this mode. The data flow in the bottom of the figure shows
in which order the converted data is written into the FIFO. The timing of the DATA_AV signal shown here is for a trigger
level of 4.
AIN
CONV_CLK
Data Into
FIFO
DATA_AV,
Trigger Level = 4
tw(CONV_CLKH)
Sample N
Channel 1,2,3,4
Sample N+1
Channel 1,2,3,4
Sample N+2
Channel 1,2,3,4
td(Pipe)
tw(CONV_CLKL)
tc
td(O)
Data N–2
Channel 4
Data N–1
Channel 1
Data N–1
Channel 2
Data N–1
Channel 3
Data N–1
Channel 4
Data N
Channel 1
Data N
Channel 2
Data N
Channel 3
Data N
Channel 4
td(DATA_AV)
td(A)
50%
Figure 30. Timing of Continuous Conversion Mode (4-channel operation)
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THS1007CDA 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
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