- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384971 > TFP503 (Texas Instruments, Inc.) PANELBUS HDCP DIGITAL RECEIVER PDF資料下載
參數(shù)資料
| 型號(hào)： | TFP503 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | PANELBUS HDCP DIGITAL RECEIVER |
| 中文描述： | PANELBUS支持HDCP數(shù)字接收機(jī) |
| 文件頁數(shù)： | 8/27頁 |
| 文件大?。?/td> | 445K |
| 代理商： | TFP503 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當(dāng)前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁
SLDS149 AUGUST 2004
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (continued)
ac specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VID(2)
VID(3)
Differential input sensitivity (see Note 8)
150
mVpp
Maximum differential input
1560
mVpp
tsk(D)
Analog input intra-pair (+ to ) differential
skew (see Note 12)
0.4
t(bit)
1.0
t(pixel)
ns
tsk(CC)
Analog input inter-pair or channel-to-channel
skew (see Note 12)
ns
Worst case differential input clock jitter
tolerance (see Notes 9 and 12)
112 MHz, 1 pixel/clock
200
ps
tr(1)
Rise time of data and control signals
(see Notes 10 and 11)
ST = Low, CL = 10 pF
ST = High, CL = 10 pF
ST = Low, CL = 10 pF
ST = High, CL = 10 pF
ST = Low, CL = 10 pF
ST = High, CL = 10 pF
ST = Low, CL = 10 pF
ST = High, CL = 10 pF
1 pixel/clock
PIXS = Low
1.9
ns
1.9
tf(1)
Fall time of data and control signals
(see Notes 10 and 11)
1.9
ns
1.9
tr(2)
Rise time of ODCK clock (see Note 10)
1.9
ns
1.9
tf(2)
Fall time of ODCK clock (see Note 10)
1.9
ns
1.9
ST = Low
CL = 10 pF
ST = High
CL = 10 pF
ST = Low
CL = 10 pF
ST = High
CL = 10 pF
ST = Low
CL = 10 pF
ST = High
CL = 10 pF
ST = Low
CL = 10 pF
ST = High
CL = 10 pF
ST = Low
CL = 10 pF
ST = High
CL = 10 pF
1.2
ns
OCK_INV = Low
1.2
tsu(1)
Setup time, data, and control signals to falling
edge of ODCK (see Note 11)
2 pixel/clock
PIXS = High
2.7
ns
STAG = High
OCK_INV = Low
2.7
2 pixel & STAG
PIXS = High
1.7
ns
STAG = Low
OCK_INV = Low
1.7
1 pixel/clock
PIXS = Low
0.9
ns
th(1)
Hold time, data, and control signals to falling
edge of ODCK (see Note 11)
OCK_INV = Low
0.9
2 pixel and STAG
PIXS = High
2.9
ns
STAG = Low
OCK_INV = Low
2.9
t(bit) is 1/10 the pixel time, t(pixel)
t(pixel) is the pixel time defined as the period of the RxC input clock. The period of ODCK is equal to t(pixel) in 1-pixel/clock mode or 2 t(pixel) when
in 2-pixel/clock mode.
NOTES:
8. Specified as ac parameter to include sensitivity to overshoot, undershoot, and reflection.
9. Measured differentially at 50% crossing using ODCK output clock as trigger.
10. Rise and fall times measured as time between 20% and 80% of signal amplitude.
11. Data and control signals are: QE[23:0], QO[23:0], DE, HSYNC, VSYNC and CTL[2:1].
12. By characterization
13. Link active or inactive is determined by amount of time detected between DE transitions. SCDT indicates link activity.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TFP503PZP | PANELBUS HDCP DIGITAL RECEIVER |
| TFP513 | TI PANELBUS DIGITAL TRANSMITTER |
| TFP513PAP | TI PANELBUS DIGITAL TRANSMITTER |
| TFP513PAPG4 | TI PANELBUS DIGITAL TRANSMITTER |
| TFPT0603 | Linear PTC Thermistors, Surface Mount Chip |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TFP503PZP | 制造商:Texas Instruments 功能描述:PANELBUS DVI RECEIVER 165MHZ PLUS HDCP |
| TFP503PZPG4 | 制造商:Texas Instruments 功能描述:DGTL RCVR 1RX 100HTQFP - Rail/Tube |
| TFP50N06 | 制造商:TAK_CHEONG 制造商全稱:Tak Cheong Electronics (Holdings) Co.,Ltd 功能描述:N-Channel Power MOSFET 50A, 60V, 0.023Ω |
| TFP510 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TI PANEL BUS DIGITAL TRANSMITTER |
| TFP510PAPG4 | 制造商:Texas Instruments 功能描述:PNLBUS DGTL TRANSMITTER 64HTQFP - Rail/Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。