參數(shù)資料
型號(hào): TEA6330T-T
廠商: NXP SEMICONDUCTORS
元件分類: 音頻控制
英文描述: 2 CHANNEL(S), SOUND FADER CONTROL CIRCUIT, PDSO28
文件頁(yè)數(shù): 18/19頁(yè)
文件大?。?/td> 147K
代理商: TEA6330T-T
January 1992
8
Philips Semiconductors
Preliminary specication
Sound fader control circuit
for car radios
TEA6330T
Fader control
Gv
fader control range
Table 5
0 to
30
dB
step width
1.5
2
2.5
dB
α
MUTE
mute attenuation
GMB-bit = 1; Table 6
74
84
dB
V
o
DC offset output voltage (pins 7, 8, 13,
14)
between any adjoining volume step
and any step to mute
Gv = 66 to 0 dB
0.2
10
mV
Gv = 0 to +20 dB
215
mV
in any treble and fader position
Gv = 66 to 0 dB
10
mV
in any bass position
Gv = 66 to 0 dB
10
mV
External mute (pin 9)
V9
input voltage for MUTE-ON (LOW)
fader is switched into
general mute position
0
1.5
V
input voltage for MUTE-OFF (HIGH)
Tables 2 and 5
3
VP
V
input voltage for MUTE-OFF
pin 9 open-circuit
5
V
I9
input current
±10
A
I2C-bus, SCL and SDA (pins 11 and 12)
V11, 12
input voltage HIGH-level
3
VP
V
input voltage LOW-level
0
1.5
V
I11, 12
input current
±10
A
VACK
output voltage at acknowledge (pin 12)
I12 = 3 mA
0.4
V
Power-on reset, when reset is active the GMU-bit (general mute) is set and the bus receiver is in reset position
VP
supply voltage for start of reset
increasing voltage
2.5
V
supply voltage for end of reset
increasing voltage
5.2
6.0
6.8
V
supply voltage for start of reset
decreasing voltage
4.2
5.0
5.8
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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