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參數(shù)資料
| 型號(hào)： | TEA6300T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 音頻控制 |
| 英文描述： | Sound fader control circuit |
| 中文描述： | 2 CHANNEL(S), SOUND FADER CONTROL CIRCUIT, PDSO28 |
| 文件頁(yè)數(shù)： | 10/22頁(yè) |
| 文件大?。?/td> | 180K |
| 代理商： | TEA6300T |
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May 1990
10
Philips Semiconductors
Product specification
Sound fader control circuit
TEA6300
TEA6300T
circuit. Signal-to-noise ratios exclude noise contribution of the power amplifier.
Signal-to-noise ratios on a CCIR 468-2 average meter reading are 4,5 dB better than on CCIR 468-2 quasi peak.
2.
I
2
C-BUS FORMAT
If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed.
Table 1
I
2
C-bus; subaddress/data
S
SLAVE ADDRESS
A
SUBADDRESS
A
DATA
A
P
S
SLAVE ADDRESS
A
=
=
=
start condition
1000 0000
acknowledge, generated by the slave
SUBADDRESS
DATA
P
=
=
=
see Table 1
see Table 1
STOP condition
FUNCTION
SUBADDRESS
DATA
D7
D6
D5
D4
D3
D2
D1
D0
volume left
volume right
bass
treble
fader
switch
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1
0 0 0 0 0 0 1 0
0 0 0 0 0 0 1 1
0 0 0 0 0 1 0 0
0 0 0 0 0 1 0 1
X
X
X
X
X
GMU
X
X
X
X
X
X
VL5
VR5
X
X
MFN
X
VL4
VR4
X
X
FCH
X
VL3
VR3
BA3
TR3
FA3
X
VL2
VR2
BA2
TR2
FA2
SCC
VL1
VR1
BA1
TR1
FA1
SCB
VL0
VR0
BA0
TR0
FA0
SCA
Function of the bits:
VL0 to VL5
VR0 to VR5
BA0 to BA3
TR0 to TR3
FA0 to FA3
FCH
MFN
SCA to SCC
GMU
volume control left
volume control right
bass control
treble control
fader control
select fader channel (front or rear)
mute control of the selected fader channel (front or rear)
source selector control
mute control (general mute)
for the outputs QLF, QLR, QRF and QRR
don't care bits (logic 1 during testing)
X
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| TEA6320T/V1,512 | 功能描述:音頻 DSP SOUND FADER CONTROL RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
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