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參數(shù)資料
| 型號： | TEA1204T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | High efficiency DC/DC converter(高效率DC/DC變換器) |
| 中文描述： | SWITCHING REGULATOR, 240 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | 3.90 MM, PLASTIC, MS-012AA, SOT-96-1, SOP-8 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大小： | 109K |
| 代理商： | TEA1204T |
1998 Mar 02
5
Philips Semiconductors
Product specification
High efficiency DC/DC converter
TEA1204T
PINNING
SYMBOL
PIN
DESCRIPTION
U/D
VSEL
UPOUT/DNIN
1
2
3
conversion mode selection input
output voltage selection input
up mode; output voltage/
down mode; input voltage
output voltage sense input
inductor connection
ground
burst mode trigger input
shut-down input
SENSE
LX
GND
BURST
SHDWN
4
5
6
7
8
Fig.2 Pin configuration.
handbook, halfpage
MBH564
1
2
3
4
8
7
6
5
U/D
SHDWN
VSEL
BURST
UPOUT/DNIN
GND
SENSE
LX
TEA1204T
FUNCTIONAL DESCRIPTION
Control mechanism
The TEA1204T DC/DC converter is able to operate in
discontinuous or continuous conduction operation.
All switching actions are completely determined by a
digital control circuit which uses the output voltage level as
its control input. This novel digital approach enables the
use of a new pulse width and frequency modulation
scheme, which ensures optimum power efficiency over the
complete range of operation of the converter. The scheme
works as follows. At low output power, a very small current
pulse is generated in the inductor, and the pulse rate
varies with a varying load. When the output voltage drops
below a specific limit, which indicates that the converter’s
current capability is not sufficient, the digital controller
switches to the next state of operation. The peak current in
the inductor is made higher, and the pulse rate can again
vary with a varying load. A third operational state is
available for even higher currents.
When high output power is requested, the device starts
operating in continuous conduction mode. This results in
minimum AC currents in the circuit components and hence
optimum efficiency, cost, and EMC. In this mode, the
output voltage is allowed to vary between two predefined
voltage levels. As long as the output voltage stays within
this so-called window, switching continues in a fixed
pattern. When the output voltage reaches one of the
window borders, the digital controller immediately reacts
by adjusting the pulse width and inserting a current step in
such a way that the output voltage stays within the window
with higher or lower current capability. This approach
enables very fast reaction to load variations. Figure 3
shows the various coil current waveforms for low and high
current capability in each power conversion mode.
Figure 4 shows the converter’s response to a sudden load
increase. The upper trace shows the output voltage.
The ripple on top of the DC level is a result of the current
in the output capacitor, which changes in sign twice per
cycle, times the capacitor’s internal Equivalent Series
Resistance (ESR). After each ramp-down of the inductor
current, i.e. when the ESR effect increases the output
voltage, the converter determines what to do in the next
cycle. As soon as more load current is taken from the
output the output voltage starts to decay. When the output
voltage becomes lower than the low limit of the window, a
corrective action is taken by a ramp-up of the inductor
current during a much longer time. As a result, the DC
current level is increased and normal continuous
conduction mode can continue. The output voltage
(including ESR effect) is again within the predefined
window.
Figure 5 depicts the spread of the output voltage window.
The absolute value is most dependent on spread, while the
actual window size is not affected. For one specific device,
the output voltage will not vary more than 4%.
Start-up
A possible deadlock situation in boost configuration can
occur after a sequence of disconnecting and reconnecting
the input voltage source. If, after disconnection of the input
source, the output voltage falls below 2.0 V, the device
may not restart properly after reconnection of the input
source, and may take continuous current from the input.
An external circuit to prevent the deadlock situation is
shown in Chapter “Application information”.
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