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參數(shù)資料
| 型號(hào)： | TE28F800BV-T80 |
| 廠(chǎng)商： | Intel Corp. |
| 英文描述： | POWERLINE: RP40-S_D_TE - 2:1 Wide Input Voltage Range- 40 Watts Output Power- 1.6kVDC Isolation- Fixed Operating Frequency- Six-Sided Continuous Shield- Design Meet Safety Standard- Standard 76.2 x66.0x10.2mm Package- Efficiency to 90% |
| 中文描述： | 2兆位SmartVoltage啟動(dòng)塊閃存系列 |
| 文件頁(yè)數(shù)： | 33/55頁(yè) |
| 文件大?。?/td> | 638K |
| 代理商： | TE28F800BV-T80 |
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E
2-MBIT SmartVoltage BOOT BLOCK FAMILY
33
SEE NEW DESIGN RECOMMENDATIONS
TEST POINTS
INPUT
OUTPUT
1.5
3.0
0.0
1.5
NOTE:
AC test inputs are driven at 3.0 V for a logic
“1” and 0.0 V for a logic “0.” Input timing begins, and output timing ends, at 1.5 V.
Input rise and fall times (10% to 90%) <10 ns.
0530_12
Figure 12. 3.3 V Inputs and Measurement Points
TEST POINTS
INPUT
OUTPUT
2.0
0.8
0.8
2.0
2.4
0.45
NOTE:
AC test inputs are driven at V
(2.4 V
) for a logic “1” and V
(0.45 V
) for a logic “0.” Input timing begins at V
IH
(2.0 V
TTL
)
and V
IL
(0.8 V
TTL
) . Output timing ends at V
IH
and V
IL
. Input rise and fall times (10% to 90%) <10 ns.
0530_13
Figure 13. 5 V Inputs and Measurement Points
C
L
OUT
V
CC
DEVICE
UNDER
TEST
R
1
R
2
0530_14
NOTE:
See table for component values.
Figure 14. Test Configuration
Test Configuration Component Values
Test Configuration
C
L
(pF)
R
1
(
) R
2
(
)
3.3 V Standard Test
50
990
770
5 V Standard Test
100
580
390
5 V High-Speed Test
30
580
390
NOTE:
C
L
includes jig capacitance.
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