參數(shù)資料
型號(hào)： TE28F800B3T110
廠商： INTEL CORP
元件分類： DRAM
英文描述： SMART 3 ADVANCED BOOT BLOCK 4-, 8-, 16-, 32-MBIT FLASH MEMORY FAMILY
中文描述： 512K X 16 FLASH 2.7V PROM, 110 ns, PDSO48
封裝： 12 X 20 MM, TSOP-48
文件頁數(shù)： 16/55頁
文件大?。?/td> 638K
代理商： TE28F800B3T110
2-MBIT SmartVoltage BOOT BLOCK FAMILY
E
16
SEE NEW DESIGN RECOMMENDATIONS
Table 3. Bus Operations for Word-Wide Mode (BYTE# = V
IH
)
Mode
Notes
RP#
CE#
OE#
WE#
A
9
A
0
V
PP
DQ
0
–15
Read
1,2,3
V
IH
V
IL
V
IL
V
IH
X
X
X
D
OUT
Output Disable
V
IH
V
IL
V
IH
V
IH
X
X
X
High Z
Standby
V
IH
V
IH
X
X
X
X
X
High Z
Deep Power-Down
9
V
IL
X
X
X
X
X
X
High Z
Intelligent Identifier
(Mfr)
4
V
IH
V
IL
V
IL
V
IH
V
ID
V
IL
X
0089 H
Intelligent Identifier
(Device)
4,5
V
IH
V
IL
V
IL
V
IH
V
ID
V
IH
X
See
Table 5
Write
6,7,8
V
IH
V
IL
V
IH
V
IL
X
X
X
D
IN
Table 4. Bus Operations for Byte-Wide Mode (BYTE# = V
IL
)
Mode
Notes
RP#
CE#
OE#
WE#
A
9
A
0
A
–1
V
PP
DQ
0–7
DQ
8–14
Read
1,2,3
V
IH
V
IL
V
IL
V
IH
X
X
X
X
D
OUT
High Z
Output
Disable
V
IH
V
IL
V
IH
V
IH
X
X
X
X
High Z
High Z
Standby
V
IH
V
IH
X
X
X
X
X
X
High Z
High Z
Deep Power-
Down
9
V
IL
X
X
X
X
X
X
X
High Z
High Z
Intelligent
Identifier (Mfr)
4
V
IH
V
IL
V
IL
V
IH
V
ID
V
IL
X
X
89H
High Z
Intelligent
Identifier
(Device)
4,5
V
IH
V
IL
V
IL
V
IH
V
ID
V
IH
X
X
See
Table
5
High Z
Write
6,7,8
V
IH
V
IL
V
IH
V
IL
X
X
X
X
D
IN
High Z
NOTES:
1. Refer to DC Characteristics
2. X can be V
IL
, V
IH
for control pins and addresses, V
PPLK
or V
PPH
for V
PP
.
3. See DC Characteristicsfor V
PPLK
, V
PPH1
, V
PPH2
, V
HH
, V
ID
voltages.
4. Manufacturer and device codes may also be accessed via a CUI write sequence, A
1
–A
16
= X, A
1
–A
17
= X.
5. See Table 5 for device IDs.
6. Refer to Table 7 for valid D
IN
during a write operation.
7. Command writes for block erase or word/byte program are only executed when V
PP
= V
PPH1
or V
PPH2
.
8. To program or erase the boot block, hold RP# at V
HH
or WP# at V
IH
. See Section 3.4.
9. RP# must be at GND ± 0.2 V
to meet the maximum deep power-down current specified.
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