
TDA9897_TDA9898_4
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 25 May 2009
18 of 103
NXP Semiconductors
TDA9897; TDA9898
Multistandard hybrid IF processing
8.9 Synthesizer
The synthesizer supports SIF/DIF frequency conversion. A large set of synthesizer
frequencies in steps of 0.5 MHz enables exible combination of SAW lter and required
conversion frequency.
Synthesizer loop internally adapted to divider ratio range for optimum phase noise
requirement (loop bandwidth).
Synthesizer reference either via 4 MHz crystal or via an external source. Individual pins
for crystal and external reference allows optimum interface denition and supports use of
custom reference frequency offset.
8.10 I2C-bus transceiver and slave address
Four different I2C-bus device addresses to enable application with multi-IC use.
I2C-bus transceiver input ports can handle three different I2C-bus voltages.
Read-out functions as TDA9887 plus additional read out of VIF AGC and VIFLOCK,
BLCKLEV and TAGC status.
9.
I2C-bus control
Table 4.
Slave address detection
Slave address
Selectable address bit
Pin ADRSEL
A3
A0
MAD1
0
1
GND
MAD2
0
VP
MAD3
1
resistor to GND
MAD4
1
0
resistor to VP
Table 5.
Slave addresses
For MAD activation via pin ADRSEL: see
Table 4.Slave address
Bit
Name
Value
A6
A5
A4
A3
A2
A1
A0
MAD1
43h
1000011
MAD2
42h
1000010
MAD3
4Bh
1001011
MAD4
4Ah
1001010