參數(shù)資料
型號: TDA9886TS/V3
廠商: NXP SEMICONDUCTORS
元件分類: 接收器
英文描述: AM/FM, AUDIO/VIDEO DEMODULATOR, PDSO24
封裝: 5.30 MM, PLASTIC, MO-150, SOT-340-1, SSOP-24
文件頁數(shù): 17/56頁
文件大小: 248K
代理商: TDA9886TS/V3
2003 Oct 02
24
Philips Semiconductors
Product specication
I2C-bus controlled single and multistandard
alignment-free IF-PLL demodulators
TDA9885; TDA9886
fVIF
VIF frequency window of digital
acquisition help
related to fVIF;
see Fig.10
±2.3
MHz
tacq
acquisition time
BL = 70 kHz; note 5
30
ms
Vi(lock)(rms)
input voltage sensitivity for PLL
to be locked (RMS value)
measured on pins VIF1
and VIF2;
maximum IF gain
30
70
V
Tcy(DAH)
cycle time of digital acquisition
help
64
s
KO(VIF)
VIF VCO steepness
denition:
fVIF/VVPLL
20
MHz/V
KD(VIF)
VIF phase detector steepness
denition:
IVPLL/VIF
23
A/rad
Video output 2 V (pin CVBS)
NORMAL MODE (SOUND CARRIER TRAP ACTIVE) AND SOUND CARRIER ON
Vo(v)(p-p)
video output voltage
(peak-to-peak value)
see Fig.5
1.7
2.0
2.3
V
Vo
video output voltage difference
difference between
L and B/G standard
12
+12
%
V/S
ratio between video
(black-to-white) and sync level
1.90
2.33
3.00
Vsync
sync voltage level
1.0
1.2
1.4
V
Vclip(u)
upper video clipping voltage
level
VP 1.1 VP 1
V
Vclip(l)
lower video clipping voltage
level
0.7
0.9
V
Ro
output resistance
note 3
30
Ibias(int)
internal DC bias current for
emitter-follower
1.5
2.0
mA
Io(sink)(max)
maximum AC and DC output
sink current
1
mA
Io(source)(max)
maximum AC and DC output
source current
3.9
mA
Vo(CVBS)
deviation of CVBS output
voltage
50 dB gain control
0.5
dB
30 dB gain control
0.1
dB
Vo(bl)
black level tilt
negative modulation
1%
V
o(bl)(v)
vertical black level tilt for worst
case in L standard
vision carrier
modulated by test line
(VITS) only
3%
Gdif
differential gain
“CCIR 330”; note 6
B/G standard
5%
L standard
7%
dif
differential phase
“CCIR 330”
2
4
deg
S/NW
weighted signal-to-noise ratio
weighted in accordance
with
“CCIR 567”;
see Fig.11; note 7
56
59
dB
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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