參數(shù)資料
型號(hào)： TDA9855
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 消費(fèi)家電
英文描述： I2C-bus controlled BTSC stereo/SAP decoder and audio processor
中文描述： SPECIALTY CONSUMER CIRCUIT, PDIP52
封裝： 0.600 INCH, PLASTIC, SOT-274-1, SDIP-52
文件頁(yè)數(shù)： 11/52頁(yè)
文件大?。?/td> 345K
代理商： TDA9855
1997 Nov 04
11
Philips Semiconductors
Product specification
I
2
C-bus controlled BTSC stereo/SAP
decoder and audio processor
TDA9855
S
UBWOOFER
;
SURROUND SOUND CONTROL
The subwoofer or the surround mode can be activated with
the control bit SUR (see Table 6). A low bit provides an
output signal
1
2
(L + R) in subwoofer mode, a high bit
selects surround mode and provides an output signal
1
2
(L
R). The signal is fed through a volume control stage
with a range from +14 to
14 dB in 2 dB steps on top of the
main channel control to the output pin OUTS. The last
setting is the mute position (see Table 11). The capacitor
C35 at pin SW provides a 230 Hz low-pass filter in
subwoofer mode. In surround mode this capacitor should
be disconnected. If balance is not in mid position the
selected left and right output levels will be combined.
M
UTE
The mute function can be activated independently with the
last step of volume or subwoofer/surround control at the
left, right or centre output. By setting the general mute bit
GMU via the I
2
C-bus all audio part outputs are muted.
All channels include an independent zero-crossing
detector. The zero-crossing mute feature can be selected
via bit TZCM:
TZCM = 0: forced mute with direct execution
TZCM = 1: execution in time with signal zero-crossing.
In the zero-crossing mode a change of the GMU bit is
activated but not executed. The execution is enabled at
the next zero-crossing of the signal. To avoid a large delay
of mute switching, when very low frequencies are
processed, or the output signal amplitude is lower than the
DC offset voltage, the following I
2
C-bus transmissions are
needed:
A first transmission for mute execution
A second transmission approximately 100 ms later,
which must switch the zero-crossing mode to forced
mute (TZCM = 0)
A third transmission to reactivate the zero-crossing
mode (TZCM = 1). This transmission can take place
immediately, but must follow before the next mute
execution.
Adjustment procedure
C
OMPOSITE INPUT LEVEL ADJUSTMENT
Apply the composite signal (from the FM demodulator)
with 100% modulation (25 kHz deviation) L + R;
f
i
= 300 Hz. Set input level control via the I
2
C-bus
monitoring line output (500 mV
±
20 mV). Store the setting
in a non-volatile memory. Adjustment of the spectral and
wideband expander is performed via the stereo channel
separation adjust.
A
UTOMATIC ADJUSTMENT PROCEDURE
Capacitors of external inputs EIL and EIR must be
grounded
Composite input signal L = 300 Hz, R = 3.1 kHz,
14% modulation for each channel; volume gain +16 dB
via the I
2
C-bus; to avoid annoying sound level set GMU
bit to logic 1 during adjustment procedure
Effects, AVL, loudness
off
Selector setting SC0, SC1 and SC2 = 0, 0, 0
(see Table 12)
Line out setting bits: STEREO = 1, SAP = 0
(see Table 21)
Start adjustment by transmission ADJ = 1 in register
ALI3; the decoder will align itself
After 1 second, stop alignment by transmitting ADJ = 0
in register ALI3 read the alignment data by an I
2
C-bus
read operation from ALR1 and ALR2
(see Chapter “I
2
C-bus protocol”) and store it in a
non-volatile memory; the alignment procedure
overwrites the previous data stored in ALI1 and ALI2
Disconnect the capacitors of external inputs from
ground.
M
ANUAL ADJUSTMENT
Manual adjustment is necessary when no dual tone
generator is available (e.g. for service).
Spectral and wideband data have to be set to 10000
(middle position for adjustment range)
Composite input L = 300 Hz; 14% modulation
Adjust channel separation by varying wideband data
Composite input L = 3 kHz; 14% modulation
Adjust channel separation by varying spectral data
Iterative spectral/wideband operation for optimum
adjustment
Store data in non-volatile memory.
After every power-on, the alignment data and the input
level adjustment data must be loaded from the non-volatile
memory.
T
IMING CURRENT FOR RELEASE RATE
Due to possible internal and external spreading, the timing
current can be adjusted via the I
2
C-bus (see Table 25) as
recommended by dbx.
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PDF描述
TDA9855WP I2C-bus controlled BTSC stereo/SAP decoder and audio processor
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TDA9855/V2,112 功能描述:音頻放大器 BTSC STEREO DECODER RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類(lèi)型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel
TDA9855N 功能描述:音頻放大器 BTSC STEREO DECODER DBXTV/AUD RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類(lèi)型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel
TDA9855WP 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:I2C-bus controlled BTSC stereo/SAP decoder and audio processor
TDA9859 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Universal hi-fi audio processor for TV
TDA9859H 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Universal hi-fi audio processor for TV
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