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參數(shù)資料
| 型號(hào)： | TDA9210 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 3 CHANNEL, VIDEO PREAMPLIFIER, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁(yè)數(shù)： | 14/19頁(yè) |
| 文件大?。?/td> | 2124K |
| 代理商： | TDA9210 |
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TDA9210
4/19
Additionally, the IC automatically works with either
positive or negative HSYNC pulses.
– When bit 0 is set to 1, BPCP is synchronized on
the leading edge of the blanking pulse BLK
(Pin 20). One can use a positive or negative
blanking pulse by programming bit 0 in
Register 9 (See Table 3 on page 13).
– BPCP width can be adjusted with bit 2 and 3 (see
Register 8, Table 2 on page 12 ).
– If the application already provides the Back
Porch Clamping Pulse, bit 4 must be set to 1
(providing a direct connection between Pin 19
and internal BPCP).
4.2 - Fast Blanking Input
The fast blanking pin (FBLK) is TTL compatible.
The blanking pulse can be:
– positive or negative
– line or Composite-type (but not Frame-type).
4.3 - Contrast Adjustment (8 bits)
The contrast adjustment is made by controlling si-
multaneously the gain of the three internal amplifi-
ers through the I2C bus interface. Register 1 al-
lows the adjustment in a range of 48 dB.
Figure 1.
4.4 - ABL Control
The TDA9210 includes an ABL (automatic beam
limitation) input to attenuate the RGB Video sig-
nals depending on the beam intensity.
The operating range is 2 V (from 3 V to 1 V). A typ-
ical 15 dB maximum attenuation is applied to the
output signal whatever the contrast adjustment is.
(See Figure 2 ).
When the ABL feature is not used, the ABL input
(Pin 2) must be connected to a 5 V supply voltage.
Figure 2.
R8b0=0 and R8b1=0
HSYNC/BPCP (Pin19)
Internal BPCP
R8b0=0 and R8b1=1
HSYNC/BPCP (Pin19)
Internal BPCP
R8b0=1
BLK (Pin20)
Internal BPCP
R8b4 =1
HSYNC/BPCP (Pin19)
Internal BPCP
5
0
-2
-4
-6
-8
-10
-12
-14
-16
Attenuation (dB)
0
V
ABL (V)
4
3
2
1
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