參數(shù)資料
型號(hào): TDA8793HL
廠商: NXP SEMICONDUCTORS
元件分類: ADC
英文描述: 8-bit, low-power, 3 V, 100 Msps Analog-to-Digital Converter ADC
中文描述: 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP32
封裝: 5 X 5 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-401-1, LQFP-32
文件頁(yè)數(shù): 6/20頁(yè)
文件大小: 110K
代理商: TDA8793HL
1999 Oct 06
6
Philips Semiconductors
Preliminary specification
8-bit, low-power, 3 V, 100 Msps
Analog-to-Digital Converter (ADC)
TDA8793
CHARACTERISTICS
V
CCA
= V
7
to V
6
= 2.7 to 3.6 V; V
CCD
= V
10
to V
9
= 2.7 to 3.6 V; V
CCO
= V
20
(or V
22
) to V
19
(or V
21
) = 2.7 to 3.6 V;
AGND to DGND and OGND shorted together; V
CCA
to V
CCD
=
0.15 to +0.15 V; V
CCD
to V
CCO
=
0.15 to +0.15 V;
V
CCA
to V
CCO
=
0.15 to +0.15 V; T
amb
= 0 to 70
°
C; typical values measured at V
CCA
= V
CCD
= V
CCO
= 3.0 V and
T
amb
= 25
°
C; single-ended input; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
V
CCA
V
CCD
V
CCO
I
CCA
I
CCD
I
CCO
analog supply voltage
digital supply voltage
output stages supply voltage
analog supply current
digital supply current
output stages supply current
2.7
2.7
2.7
32
13
3.0
3.0
3.0
40
16
0.1
4
3.6
3.6
3.6
48
22
tbf
tbf
V
V
V
mA
mA
mA
mA
f
i
= ramp input
f
i
= 20 MHz
Internal reference (pin SDN);
note 1
V
ref
V
reg
TC
I
L
Internal reference (pin REFOUT)
reference voltage
line regulation voltage
temperature coefficient
load current
1.21
1
1.25
0.4
18
1.29
3
V
mV
ppm/K
mA
2.7 < V
CCA
< 3.6 V
V
o(ref)
V
o(reg)
TC
I
L
Adjustable full scale input (pin REFIN);
see Figs 3, 4
,
and 7
reference voltage
line regulation voltage
temperature coefficient
load current
1.76
1
1.82
1.5
18
1.88
4
V
mV
ppm/K
mA
2.7 < V
CCA
< 3.6 V
I
ref
Clock input (pin CLK);
note 2
input current
V
REFIN
= 1.25 V
0.87
mA
V
IL
V
IH
I
IL
I
IH
t
r
t
f
Z
i
C
i
Standby input (pin STDBY);
see Table 1
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
clock rise time
clock fall time
input impedance
input capacitance
0
2
2
0.75
0.75
32
2
0.8
V
CCD
+2
5
tbf
tbf
V
V
μ
A
μ
A
ns
ns
k
pF
V
CLK
= 0
V
CLK
= V
CCD
f
CLK
= 100 MHz
f
CLK
= 100 MHz
V
IL
V
IH
I
IL
I
IH
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
0
2
5
0.8
V
CCD
5
V
V
μ
A
μ
A
V
STDBY
= 0
V
STDBY
= V
CCD
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