參數(shù)資料
型號: TDA8783
廠商: NXP Semiconductors N.V.
英文描述: 40 Msps, 10-bit analog-to-digital interface for CCD cameras
中文描述: 40 MSPS的10位模擬到數(shù)字的CCD相機接口
文件頁數(shù): 13/28頁
文件大小: 131K
代理商: TDA8783
1999 Jun 25
13
Philips Semiconductors
Product specification
40 Msps, 10-bit analog-to-digital interface
for CCD cameras
TDA8783
Table 1
Serial interface programming
Note
1.
When CLPADC is HIGH (D4 = 1: serial interface), the ADC input is clamped to voltage level V
ref
.
V
ref
is connected to ground via a capacitor.
ADDRESS BITS
DATA BITS D9 to D0
A2
A1
A0
0
0
0
0
0
1
OFD output control (D7 to D0).
Cut-off frequency of CDS and AGC. Only the 4 LSBs (D3 to D0) are used for
CDS. D4 to D7 are used for AGC. D8 and D9 should be set to logic 0.
AGC gain control (D8 to D0).
Partial standby controls for power consumption optimization. Only the 4 LSBs
(D3 to D0) are used. Edge control for pulses SHP, SHD, CLAMP and
clock ADC:
D0 = 1: CDS + AGC in standby; I
CCA
+ I
CCD
= 48 mA
D1 = 1: OFD DAC in standby; I
CCA
+ I
CCD
= 98 mA
D2 = 1: 6 dB amplifier (output on AMPOUT pin) in standby;
I
CCA
+ I
CCD
= 98.5 mA
D3 = 1: SHP and SHD activated with falling edge (for positive pulse)
D4 = 1: CLPDM, CLPOB and CLPADC activated on high level; note 1
D5 = 0: CLKADC activated with falling edge
D6 must be set to logic 0.
Clamp reference DAC (D9 to D0).
0
0
1
1
0
1
1
0
0
Table 2
Standby selection
STDBY
DATA BITS D9 to D0
I
CCA
+ I
CCD
(TYP.)
4 mA
99 mA
1
0
LOW
active
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