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參數(shù)資料
| 型號： | TDA8768H |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 12-bit high-speed Analog-to-Digital Converter ADC |
| 中文描述： | 12位高速模擬數(shù)字轉(zhuǎn)換器模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 9/20頁 |
| 文件大小： | 144K |
| 代理商： | TDA8768H |
1998 Aug 26
9
Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital
Converter (ADC)
TDA8768
T
HERMAL NOISE
N
th(rms)
thermal noise (RMS value)
grounded input;
f
CLK
= 40 MHz
0.25
tbf
LSB
S
PURIOUS FREE DYNAMIC RANGE
DR
sf
spurious free dynamic range
f
i
= 4.43 MHz
f
i
= 10 MHz
f
i
= 20 MHz
tbf
tbf
tbf
69
tbf
tbf
dB
dB
dB
S
IGNAL
-
TO
-
NOISE RATIO
; note 5
S/N
signal-to-noise ratio
without harmonics;
f
CLK
= 40 MHz; f
i
= 4.43 MHz
67
dB
E
FFECTIVE NUMBER OF BITS
; note 5
N
bit
effective number of bits
TDA8768H/4 (f
CLK
= 40 MHz)
f
i
= 4.43 MHz
f
i
= 10 MHz
f
i
= 15 MHz
f
i
= 4.43 MHz
f
i
= 10 MHz
f
i
= 15 MHz
f
i
= 20 MHz
10.3
tbf
tbf
9.9
tbf
tbf
tbf
bits
bits
bits
bits
bits
bits
bits
effective number of bits
TDA8768H/5 (f
CLK
= 55 MHz)
I
NTERMODULATION
; note 6
TTIR
two-tone intermodulation
rejection
third order intermodulation
distortion
f
CLK
= 40 MHz
tbf
66
dB
d
3
f
CLK
= 40 MHz
tbf
67
dB
B
IT ERROR RATE
BER
bit error rate
f
CLK
= 40 MHz;
f
i
= 4.43 MHz;
V
I
=
±
16 LSB at code 2047
10
15
tbf
times/
sample
Timing (C
L
= 10 pF);
see Fig.3 and note 7
t
d(s)
t
h
t
d
sampling delay time
output hold time
output delay time
4
10
13
2
15
18
ns
ns
ns
ns
V
CCO
= 5.25 V
V
CCO
= 3.0 V
3-state output delay times;
see Fig.4
t
dZH
t
dZL
t
dHZ
t
dLZ
enable HIGH
enable LOW
disable HIGH
disable LOW
14
16
16
14
18
20
20
18
ns
ns
ns
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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| TDA8768H/4 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:12-bit high-speed Analog-to-Digital Converter ADC |
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