參數(shù)資料
型號(hào): TDA8767H
廠(chǎng)商: NXP Semiconductors N.V.
英文描述: 12-bit high-speed Analog-to-Digital Converter ADC
中文描述: 12位高速模擬數(shù)字轉(zhuǎn)換器模數(shù)轉(zhuǎn)換器
文件頁(yè)數(shù): 9/20頁(yè)
文件大?。?/td> 147K
代理商: TDA8767H
1999 Feb 16
9
Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital
Converter (ADC)
TDA8767
Notes to the characteristics
1.
The
3 dB (or
1 dB) analog bandwidth is determined by the 3 dB (or 1 dB) reduction in the reconstructed output,
the input being a full-scale sine wave.
2.
THD (total harmonic distortion) is obtained with the addition of the first five harmonics:
(2nd)2
+
+
+
F being the fundamental harmonic referenced at 0 dB for a full-scale sine wave input.
The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale
input (square wave signal) in order to sample the signal and obtain correct output data (see Fig.5).
Output data acquisition: the output data is available after the maximum delay of t
d
.
3.
4.
S
IGNAL
-
TO
-
NOISE RATIO
S/N
signal-to-noise ratio
without harmonics;
f
clk
= 30 MHz; f
i
= 4.43 MHz
61
dB
Timing (C
L
= 15 pF);
note 4; see Fig.3
t
ds
t
h
t
d
sampling delay time
output hold time
output delay time
8
12
15
2
15
18
ns
ns
ns
ns
V
CCO
= 4.75 V
V
CCO
= 3.15 V
3-state output delay times;
see Fig.4
t
dZH
t
dZL
t
dHZ
t
dLZ
enable HIGH
enable LOW
disable HIGH
disable LOW
14
16
16
14
18
20
20
18
ns
ns
ns
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
THD
20 log
(3rd)2
(4th)2
(5th)2
(6th)2
+
-----------------------------------------------------F
=
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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