參數(shù)資料
型號: TDA8767
廠商: NXP Semiconductors N.V.
英文描述: 12-bit high-speed Analog-to-Digital Converter ADC
中文描述: 12位高速模擬數(shù)字轉(zhuǎn)換器模數(shù)轉(zhuǎn)換器
文件頁數(shù): 8/20頁
文件大?。?/td> 147K
代理商: TDA8767
1999 Feb 16
8
Philips Semiconductors
Preliminary specification
12-bit high-speed Analog-to-Digital
Converter (ADC)
TDA8767
Voltage controlled regulator input V
ref
(referenced to V
CCA
)
V
ref(FS)
V
i(p-p)
V
i(p-p)
input voltage amplitude
(peak-to-peak value)
full scale fixed voltage
V
CCA
= 5 V
differential mode
single mode; V
i
= 2.5 V
3.175
2.0
2.0
10
V
V
V
μ
A
I
ref
input current at V
ref
Outputs (referenced to DGND)
D
IGITAL OUTPUTS
D11
TO
D0
AND
IR (
REFERENCED TO
DGND)
V
OL
V
OH
I
O
LOW-level output voltage
HIGH-level output voltage
output current in 3-state
I
OL
= 2 mA
I
OH
=
0.4 mA
0.5 V < V
O
< V
CCO
0
V
CCO
0.5
20
0.5
V
CCD
+20
V
V
μ
A
Switching characteristics
C
LOCK FREQUENCY
f
clk
(see Fig.3)
f
clk(min)
minimum clock frequency
SH = HIGH
SH = LOW
1
1
MHz
kHz
f
clk(max)
maximum clock frequency
TDA8767H/1
TDA8767H/2
TDA8767H/3
clock pulse width HIGH
clock pulse width LOW
10
20
30
8.5
8.5
MHz
MHz
MHz
ns
ns
t
CPH
t
CPL
Analog signal processing; 50% clock duty factor; V
i
V
i
= 2.0 V; V
ref
= V
CCA
2 V;
see Table 1
L
INEARITY
ILE
DLE
integral non-linearity
differential non-linearity
f
clk
= 4 MHz; ramp input
f
clk
= 4 MHz; ramp input;
no missing codes
V
CCA
= V
CCD
= V
CCO
= 5 V;
T
amb
= 25
°
C; V
i
= V
i
; output
code = 2047
V
CCA
= V
CCD
= V
CCO
= 5 V;
T
amb
= 25
°
C; V
i
V
i
=
2.0 V
±
3.0
±
0.6
±
4.0
±
1
LSB
LSB
OFER
offset error
tbf
tbf
LSB
GER
gain error amplitude; spread
from device to device
tbf
tbf
LSB
B
ANDWIDTH
(f
clk
= 30 MHz); note 1
B
analog bandwidth
1 dB
3 dB
full scale square wave;
note 3
full scale square wave;
note 3
9
18
tbf
MHz
MHz
ns
t
STLH
analog input settling time
LOW-to-HIGH transition
analog input settling time
HICH-to-LOW transition
t
STHL
tbf
ns
H
ARMONICS
THD
total harmonic distortion
f
clk
= 30 MHz; f
i
= 4.43 MHz;
note 2
64
dB
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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