- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368630 > TDA8764ATS (NXP Semiconductors N.V.) 10-bit high-speed low-power ADC PDF資料下載
參數(shù)資料
| 型號： | TDA8764ATS |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 10-bit high-speed low-power ADC |
| 中文描述： | 10位高速低功耗ADC |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 134K |
| 代理商： | TDA8764ATS |
2000 Jul 03
10
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
Notes
1.
The rise and fall times of the clock signal must not be less than 0.5 ns.
2.
The input admittance is
3.
Analog input voltages producing code 0 up to and including code 1023:
a) V
offset(B)
(offset voltage BOTTOM) is the difference between the analog input which produces data equal to 00
and the reference voltage BOTTOM (V
RB
) at T
amb
= 25
°
C.
b) V
offset(T)
(offset voltage TOP) is the difference between V
RT
(reference voltage TOP) and the analog input which
produces data outputs equal to code 1023 at T
amb
= 25
°
C.
In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities
of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
pins V
RB
and V
RT
via offset resistors R
OB
and R
OT
as shown in Fig.4.
4.
a) Thecurrentflowingintotheresistorladderis
andthefull-scaleinputrangeattheconverter,
to cover code 0 to 1023, is
b) Since R
L
, R
OB
and R
OT
have similar behaviour with respect to process and temperature variation, the ratio
R
OB
R
L
R
OT
+
+
will be kept reasonably constant from device to device. Consequently variation of the output
codes at a given input voltage depends mainly on the difference V
RT
V
RB
and its variation with temperature and
supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the
matching between each of them is then optimized.
5.
6.
The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device.
No glitches greater than 2 LSBs, nor any significant attenuation are observed in the reconstructed signal.
Timing (f
clk
= 60 MHz; C
L
= 10 pF);
see Fig.5 and note 10
t
ds
t
h
t
d
sampling delay time
output hold time
output delay time TDA8764ATS
4
0.2
0.7
10
9
13
12
0.3
2
14
13
17
16
10
ns
ns
ns
ns
ns
ns
pF
V/ns
V
CCO
= 2.7 V
V
CCO
= 3.3 V
V
CCO
= 2.7 V
V
CCO
= 3.3 V
t
d
output delay time TDA8764AHL
C
L
SR
digital output load capacitance
slew rate
V
CCO
= 2.7 V
3-state output delay times (f
clk
= 60 MHz);
see Fig.6
t
dZH
t
dZL
t
dHZ
t
dLZ
enable HIGH
enable LOW
disable HIGH
disable LOW
V
CCO
= 3.3 V
V
CCO
= 3.3 V
V
CCO
= 3.3 V
V
CCO
= 3.3 V
16
30
25
23
20
34
30
27
ns
ns
ns
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Y
i
1
R
i
----
j
ω
Ci
+
=
I
L
V
V
+
R
OB
R
L
R
L
R
OT
+
-----------------------------------------
=
V
I
R
L
I
L
×
OB
R
OT
+
+
R
=
=
V
(
RT
×
V
RB
)
–
0.8375
V
(
RT
V
RB
)
–
×
=
R
E
G
V
-------------------------------------V
V
–
V
i(p-p)
(
i(p-p)
100
×
=
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TDA8764 | 10-bit high-speed low-power ADC with internal reference regulator |
| TDA8764TS | 10-bit high-speed low-power ADC with internal reference regulator |
| TDA8765 | 10-bit high-speed Analog-to-Digital Converter ADC |
| TDA8765H | 10-bit high-speed Analog-to-Digital Converter ADC |
| TDA8766 | 10-bit high-speed 2.7 to 5.25 V analog-to-digital converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA8764ATS/6 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:10-bit high-speed low-power ADC |
| TDA8764HL/4 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:10-bit high-speed low-power ADC with internal reference regulator |
| TDA8764HL/8 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:10-bit high-speed low-power ADC with internal reference regulator |
| TDA8764TS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:10-bit high-speed low-power ADC with internal reference regulator |
| TDA8764TS/4 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:10-bit high-speed low-power ADC with internal reference regulator |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。