參數(shù)資料
型號(hào): TDA8722T
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: I2C-bus programmable modulator for negative video modulation and FM sound
中文描述: SPECIALTY CONSUMER CIRCUIT, PDSO20
文件頁(yè)數(shù): 6/28頁(yè)
文件大?。?/td> 196K
代理商: TDA8722T
1998 Jun 23
6
Philips Semiconductors
Product specification
I
2
C-bus programmable modulator for
negative video modulation and FM sound
TDA8722
To bias the audio input it is necessary to put a resistor in
the application between pin 1 and ground. The resistor
has a typical value of 12 k
.
The RF part of the oscillator consists of:
An oscillator which operates at the required video
carrier frequency. The range of the oscillator is
determined in the application by C5, C6, L5 and D5.
An RF mixer. It first combines the video signal and the
sound subcarrier to build a baseband TV channel.
Then the baseband signal is mixed with the oscillator
signal to get the RF TV channel. The mixer has two
outputs which can be used as two independent
asymmetrical outputs, or as one symmetrical output. In
the event of asymmetrical use, the unused output must
be loaded with a 75
resistor (see Fig.7).
The oscillator frequency is set by a programmable PLL
frequency synthesizer in accordance with equation:
f
osc
= 8
×
N
×
f
ref
Where:
f
osc
is the local oscillator frequency.
N is a 12-bit dividing number (10 bits are programmable
by the I
2
C-bus).
f
ref
is the crystal frequency (4 MHz) divided by 128
(31.25 kHz).
The circuit allows a step of 250 kHz but because only
10 bits are programmable, the programming steps are
1 MHz.
When the PLL loop is locked, both inputs of the phase
comparator are equal, which gives equation:
f
N
×
During the test mode operation, f
DIV
and f
ref
can be
monitored on the output Port pin (pin 14).
Software information
The synthesizer is controlled via a two-wire I
2
C-bus
receiver. For programming, the address byte (C8 HEX)
has to be sent first. Then one or two data bytes are used
to set the 10 programmable bits of the dividing number N,
the test bits (see Table 1) and the output Port state. Note
that after power-up of the IC, the two data bytes must be
sent.
f
DIV
8
f
128
f
ref
=
=
=
Fig.3 Test pattern signal.
handbook, full pagewidth
0
10
20
30
40
50
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64
70
MBE395
t (
μ
s)
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