參數(shù)資料
型號: TDA8310A
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: PAL/NTSC colour processor for PIP applications
中文描述: SPECIALTY CONSUMER CIRCUIT, PDIP52
封裝: 0.600 INCH, PLASTIC, SOT-247-1, SDIP-52
文件頁數(shù): 15/24頁
文件大?。?/td> 129K
代理商: TDA8310A
1996 Jan 25
15
Philips Semiconductors
Product specification
PAL/NTSC colour processor
for PIP applications
TDA8310A
Notes
1.
This parameter is not tested during production and is just given as application information for the designer of the
television receiver.
This parameter is not tested during production but is guaranteed by the design and qualified by means of matrix
batches which are made in the pilot production period.
Signal with negative-going sync. Amplitude includes sync pulse amplitude.
Burst amplitude; for a colour bar with 75% saturation the chrominance signal amplitude is 660 mV (p-p).
The IC has two 3-level switch control inputs for the selection of the video signal for the decoder and synchronization
circuits. The video source for internal or external signal is selected via pin 32, also the polarity of the demodulation
for the internal signal. When the video switch is in the external position the voltage level of pin 9 determines whether
the video filters are switched to CVBS or Y/C. It is also possible via pin 9 to select an automatic detection of the
Y/C signal.
This value is internally generated when the pin is left open-circuit (the minimum value of the series resistor is 25 k
).
The
3 dB bandwidth of the circuit can be calculated by means of the following equation:
2Q
2.
3.
4.
5.
6.
7.
8.
9.
The slicing level is independent of the sync pulse amplitude.
The horizontal and vertical sync are stable while processing Copy Guard signals and signals with phase shifted sync
pulses (stretched tapes). Trick mode conditions of the VCR will also not disturb the synchronization. The value given
is the delay caused by the vertical sync pulse integrator. The integrator has been designed such that the vertical sync
is not disturbed for special anti-copy tapes with vertical sync pulses with an on/off time of 10/22
μ
s.
10. The timing pulses for the vertical ramp generator are obtained from the horizontal oscillator via a divider circuit.
This divider circuit has 2 search modes of operation:
a) The ‘large window’ mode is switched on when the circuit is not synchronized or, when a non-standard signal is
received (the number of lines per frame in the 50 Hz mode is between 311 and 314 and in the 60 Hz mode
between 261 and 264). In the search mode the divider can be triggered between line 244 and line 361
(approximately 45 to 64.5 Hz).
b) The ‘narrow window’ mode is switched on when more than 15 successive vertical sync pulses are detected in the
narrow window. When the circuit is in the standard mode and a vertical sync pulse is missing the retrace of the
vertical ramp generator is started at the end of the window. Consequently, the disturbance of the picture is very
small. The circuit will switch back to the search window when, for 6 successive vertical periods, no sync pulses
are found within the window.
F
AST BLANKING OUTPUT
(
PIN
5)
V
OH
V
OL
Z
O
Z
O(off)
t
r
t
f
t
d
HIGH level output voltage
LOW level output voltage
output impedance
output impedance in the ‘off’ state
rise time of the output pulse
fall time of the output pulse
delay difference between fast
blanking and RGB at the outputs
maximum load current
2
0
100
3
0.3
300
30
30
30
V
V
k
ns
ns
ns
I
load
1
mA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
f
3 dB
f
osc
1
-1
=
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