參數(shù)資料
型號(hào)： TDA7502E013TR
廠商： STMICROELECTRONICS
元件分類(lèi)： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝： 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, TQFP-44
文件頁(yè)數(shù)： 8/26頁(yè)
文件大小： 345K
代理商： TDA7502E013TR
I2C timing
TDA7502
5
I2C timing
Figure 15.
Definition of timing for the I2C bus.
tBUF
SDA
SCL
D02AU1371
tHD:STA
tR
tSU:STA
tSU:STO
tHD:DAT
tF
tSU:DAT
tLOW
tHIGH
tHD:STA
Table 14.
Definitions
Symbol
Parameter
Test condition
Standard
mode
I2C bus
Fast mode
I2C bus
Unit
Min.
Max.
Min.
Max.
FSCL
SCLl clock frequency
0
100
0
400
kHz
tBUF
Bus free between a STOP and Start
Condition
4.7
–
1.3
–
μs
tHD:STA
Hold time (repeated) START condition.
After this period, the first clock pulse is
generated
4.0
–
0.6
–
μs
tLOW
LOW period of the SCL clock
4.7
–
1.3
–
μs
tHIGH
HIGH period of the SCL clock
4.0
–
0.6
–
μs
tSU:STA Set-up time for a repeated start condition
4.7
–
0.6
–
μs
tHD:DAT DATA hold time
0
–
0
0.9
μs
tR
Rise time of both SDA and SCL signals
Cb in pF
–
1000
20+0.1Cb
300
ns
tF
Fall time of both SDA and SCL signals
Cb in pF
–
300
20+0.1Cb
300
ns
tSU;STO Set-up time for STOP condition
4
–
0.6
–
μs
tSU:DAT Data set-up time
250
--
100
ns
Cb
Capacitive load for each bus line
–
400
–
400
pF
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