參數(shù)資料
型號(hào)： TDA7476013TR
廠商： STMICROELECTRONICS
元件分類(lèi)： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PDSO24
封裝： SOP-24
文件頁(yè)數(shù)： 2/22頁(yè)
文件大?。?/td> 377K
代理商： TDA7476013TR
TDA7476
10/19
s
The minimum voltage of the AUX IN pins to sense the open load condition is 2V.
s
The minimum voltage of the AUX IN pin to detect the short circuit to GND by sensing drop on the resistor
is 4.5V. If this voltage is below 2V, the AUX line is considered short circuited to GND. From 2V to 4.5V
the sensing circuit can detect a short circuit in both ways (by sensing across the resistor or through the
voltage between the AUX IN pin and GND).
I2C BUS INTERFACE
Data transmission from microprocessor to the TDA7476 and viceversa takes place through the 2 wires I2C BUS
interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
Data Validity
As shown by fig. 2, the data on the SDA line must be stable during the high period of the clock. The HIGH and
LOW state of the data line can only change when the clock signal on the SCL line is LOW.
Start and Stop Conditions
As shown by fig. 3 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop
condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.
Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig.4). The
receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that
the SDAline is stable LOW during this clock pulse.
* Transmitter
= master (
P) when it writes an address to the TDA7476
= slave (TDA7476) when the
P reads a data byte from TDA7476
** Receiver
= slave (TDA7476) when the
P writes an address to the TDA7476
= master (
P) when it reads a data byte from TDA7476
Figure 2. Data Validity on the I2CBUS
SDA
SCL
DATA LINE
STABLE, DATA
VALID
CHANGE
DATA
ALLOWED
D99AU1031
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