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參數(shù)資料
| 型號： | TDA7404D |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 音頻控制 |
| 英文描述： | 1 CHANNEL(S), TONE CONTROL CIRCUIT, PDSO28 |
| 封裝： | SOP-28 |
| 文件頁數(shù)： | 15/35頁 |
| 文件大小： | 633K |
| 代理商： | TDA7404D |
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I2C bus interface
TDA7404
5
I2C bus interface
5.1
Interface protocol
The interface protocol comprises:
●
a start condition (S)
●
a chip address byte (the LSB bit determines read / write transmission)
●
a subaddress byte
●
a sequence of data (N-bytes + acknowledge)
●
a stop condition (P)
●
the max. clock speed is 500 Kbits/s
Figure 17.
Software specification
S
= Start
R/W
= "0" -> Receive-Mode (Chip could be programmed by P)
"1" -> Transmission-Mode (Data could be received by P)
ACK
= Acknowledge
P
= Stop
5.2
Transmitted data (send mode)
SM = Soft mute activated
X = Not Used
The transmitted data is automatic updated after each ACK. Transmission can be repeated
without new chipaddress.
5.3
Reset condition
A Power on reset is invoked if the supply voltage is below than 3.5V. After that the following
data is written automatically into the registers of all subaddresses:
The programming after POR is marked bold-face / underlined in the programming tables.
S
1
0
1
0
R/W
ACK
P
MSB
LSB
MSB
LSB
MSB
LSB
CHIP ADDRESS
D99AU1044
I3
I0
SUBADDRESS
DATA 1 to DATA n
I2 I1
A3 A2 A1 A0
MSB
LSB
XX
X
SM
MSB
LSB
1
110
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