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參數(shù)資料
| 型號(hào)： | TDA7303TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 音頻控制 |
| 英文描述： | 2 CHANNEL(S), VOLUME CONTROL CIRCUIT, PDSO28 |
| 封裝： | ROHS COMPLIANT, SOP-28 |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 252K |
| 代理商： | TDA7303TR |
TDA7303
Software specification
4
Software specification
4.1
Interface protocol
The interface protocol comprises:
●
A start condition (s)
●
A chip address byte, containing the TDA7303 address (the 8th bit of the byte must be
0).
The TDA7303 must always acknowledge at the end of each transmitted byte.
●
A sequence of data (N-bytes + acknowledge)
●
A stop condition (P)
Figure 23.
Interface protocol
ACK = Acknowledge
S = Start
P = Stop
Max. clock speed 400 kbits/s
4.2
Subaddress (receive mode)
Ax = 1.25dB steps; Bx = 10dB steps; Cx = 2dB steps; Gx = 3.75dB steps
Table 6.
Chip address
MSB
LSB
1
0
001
00
0
Table 7.
Data bytes
MSB
LSB
Function
0
B2
B1
B0
A2
A1
A0
Volume control
1
0
B1
B0
A2
A1
A0
Speaker ATT LR
1
B1
B0
A2
A1
A0
Speaker ATT RR
1
0
B1
B0
A2
A1
A0
Speaker ATT LF
1
0
1
B1
B0
A2
A1
A0
Speaker ATT RF
0
1
0
G1
G0
S2
S1
S0
Audio switch
0
1
0
C3
C2
C1
C0
Bass control
0
1
C3
C2
C1
C0
Treble control
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