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參數(shù)資料
| 型號： | TDA5341G |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 運動控制電子 |
| 英文描述： | Brushless DC motor and VCM drive circuit with speed control |
| 中文描述： | BRUSHLESS DC MOTOR CONTROLLER, 1.9 A, PQFP64 |
| 文件頁數(shù)： | 8/28頁 |
| 文件大?。?/td> | 169K |
| 代理商： | TDA5341G |
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1997 Jul 10
8
Philips Semiconductors
Product specification
Brushless DC motor and VCM drive circuit
with speed control
TDA5341
Table 2
Summary of uncontrolled modes
FAILURE
MOT1, 2 AND 3
high impedance
→
LOW
VCM+ AND VCM
VCM
= 0.65 V;
VCM+ = 0 V
VCM
= 0.65 V;
VCM+ = 0 V
RESETOUT
EFFECT
Thermal
shut-down
Voltage
shut-down
LOW
automatic park and brake
high impedance
→
LOW
LOW
automatic park and brake
Controlled modes
S
PINDLE DISABLE
The spindle circuitry is switched off when bit 23 (SPINDLE
DISABLE) of the serial port is pulled HIGH. In that mode,
the reference band gap generator is cut off so that all
internal current sources are disabled. Both the spindle and
actuator outputs will be set to the high impedance state
because the upper converter is also turned off.
It should be noted that the uncommitted operational
amplifier is also disabled in that mode.
VCM
DISABLE
The actuator will be disabled when bit 22 (VCM DISABLE)
is set to logic 1; the spindle circuitry is not affected in that
mode. The retract circuitry also remains active, so that the
heads can be parked although the VCM is disabled. In that
mode, the current consumption can be reduced by
±
4 mA.
S
LEEP MODE
The sleep mode is obtained by pulling both the SPINDLE
and VCM DISABLE bits of the serial port HIGH. The power
monitor circuitry only remains active in sleep mode.
R
ETRACT
Retract is activated by pulling either bit 21 (PARK) HIGH
or RETRACT (pin 30) LOW. When RETRACT is set LOW,
a voltage of 0.65 V is applied to pin VCM
for parking.
It should be noted that the park voltage can be made
adjustable by changing one of the interconnect masks.
Accordingly, some different voltages, varying from
0.2 to 1.2 V, can quickly be obtained on customer
demand. This mode does not affect the control of the
spindle rotation.
B
RAKE MODE
The brake mode is activated by pulling BRAKE (pin 11)
LOW. When a voltage of less than 0.8 V is applied to pin
BRAKE, the 3 motor outputs are short-circuited to ground,
which results in a quick reduction of the speed until the
motor stops completely.
F
RICTION REDUCTION
Pulling FREDENA HIGH activates the friction reduction
mode of the TDA5341. In that mode, a clock signal fed via
pin TESTIN will cause the MOT outputs to sequentially
switch-on and switch-off at the same frequency and, as a
result, generate an AC spindle torque high enough to
overcome the head stiction.
Before start-up, the head stiction might be higher than
normal due to condensation between the head(s) and the
disk(s). Normal spin-up is not possible when this friction
torque is higher than the start-up torque of the spindle
motor. Spin-up is then only possible after friction has been
reduced by breaking the head(s) free. Bringing a static
friction system into mechanical resonance is an effective
method to break static friction head(s) free.
The resonance frequency is:
2
π
Where:
C = Stiffness of the head-spring(s) in direction of disk(s)
rotation, (N/m)
J = Inertia of the disk(s), (kg/m
2
).
The external clock input frequency must be:
2
π
A burst of n
×
6 clock pulse will bring the system into
resonance and break the heads free (n > 2). Once the
heads have been broken free, the normal spin-up
procedure can be applied.
It should be noted that the clock frequency must be smaller
than 40000/CAPCDM (nF).
f
res
1
0.5
C
J-
×
=
f
clk
6
0.5
C
J-
×
=
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