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參數(shù)資料
| 型號： | TDA4866J |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 偏轉(zhuǎn) |
| 英文描述： | VERTICAL DEFLECTION IC, PZIP9 |
| 封裝： | POWER, PLASTIC, SOT-523-1, DIL-BENT-SIL, 9 PIN |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 108K |
| 代理商： | TDA4866J |
2001 Aug 07
5
Philips Semiconductors
Product specication
Full bridge current driven vertical deection
booster
TDA4866
Flyback generator
During flyback the flyback generator supplies the output
stage A with the flyback voltage. This makes it possible to
optimize power consumption (supply voltage VP) and
flyback time (flyback voltage VFB). Due to the absence of a
decoupling capacitor the flyback voltage is fully available.
In parallel with the deflection yoke and the damping
resistor (Rp) an additional RC combination (RSP; CSP) is
necessary to achieve an optimized flyback behaviour.
Protection
The output stages are protected against:
Thermal overshoot
Short-circuit of the coil (pins 4 and 6).
Guard circuit
The internal guard circuit provides a blanking signal for the
CRT. The guard signal is active HIGH:
At thermal overshoot
When feedback loop is out of range
During flyback.
The internal guard circuit will not be activated, if the input
signals on pins 1 and 2 delivered from the driver circuit are
out of range or at short-circuit of the coil (pins 4 and 6).
For this reason an external guard circuit can be applied to
detect failures of the deflection (see Fig.8). This circuit will
be activated when flyback pulses are missing, which is the
indication of any abnormal operation.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages referenced to pin 5 (GND); unless
otherwise specied.
Notes
1. Maximum output currents I4 and I6 are limited by current protection.
2. For VP > 13 V the guard voltage V8 is limited to 13 V.
3. Internally limited by thermal protection; switching point
≥150 °C.
4. Equivalent to discharging a 200 pF capacitor through a 0
series resistor.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VP
supply voltage (pin 3)
0
30
V
VFB
yback supply voltage (pin 7)
0
60
V
IFB
yback supply current
0
±1.8
A
V1,V2
input voltage
0
VP
V
I1,I2
input current
0
±5mA
V4,V6
output voltage
0
VP
V
I4,I6
output current
note 1
0
±1.8
A
V9
feedback voltage
0
VP
V
I9
feedback current
0
±5mA
V8
guard voltage
note 2
0
VP + 0.4
V
I8
guard current
0
±5mA
Tstg
storage temperature
20
+150
°C
Tamb
ambient temperature
20
+75
°C
Tj
junction temperature
note 3
20
+150
°C
Ves
electrostatic handling voltage
note 4
500
+500
V
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