參數資料
型號: TDA4340X
廠商: SIEMENS A G
元件分類: 消費家電
英文描述: Stereo Decoder/Noise Blanker
中文描述: SPECIALTY CONSUMER CIRCUIT, PDSO20
封裝: PLASTIC, DSO-20
文件頁數: 5/15頁
文件大小: 671K
代理商: TDA4340X
TDA 4340X
Semiconductor Group
5
04.96
2
Circuit Description
Power Supply, Reference Current
A temperature stable, low noise reference voltage generator is used for better ripple
rejection and for the generation of a reference current. This current is used as a time
base for the deemphasis, the gate time of the pulse former, and the pilot cancellation,
avoiding temperature and tolerance effects.
MPX Input, MPX Filter
Adjusting the value of the input resistor, the MPX input can be adapted to the output level
of the FM demodulator. A 4-pole low-pass filter determines the bandwidth of the MPX
signal.
Voltage Controlled Oscillator, Phase Detector
The 456 kHz oscillator and the frequency dividers are used as walsh function generators
(suppression of 3rd order harmonics) for:
– 38 kHz for the stereo decoder
– 19 kHz inphase for phase detector and pilot cancellation
– 19 kHz quadrature for the phase detector.
The phase detector locks the on-chip 19 kHz signal to the pilot tone in the MPX signal at
90
°
phase.
Pilot Detector, Pilot Indicator, Pilot Cancellation
The voltage at the pilot detector output is proportional to the pilot tone input level. If that
level is high enough, the pilot indicator output is activated and the pilot Cancellation
turned on: a 19 kHz signal proportional to the voltage at the pilot detector output is added
to the MPX signal with inverse polarity, cancelling the 19 kHz pilot tone.
Interference Detector, Noise Detector, Pulse Former
The signal from the interference input (MPX or field strength signal) passes a 4-pole
high-pass to the noise blanking circuitry. The average noise level is stored on an external
capacitor. The interference detector compares the actual noise level with that stored on
the capacitor and triggers the pulse former if there is a significant difference. The pulse
former generates a gate pulse for the HCC block. During that pulse time the outputs of
the deemphasis circuit are switched to hold mode.
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