參數(shù)資料
型號: TDA1591
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: PLL stereo decoder and noise blanker
中文描述: SPECIALTY CONSUMER CIRCUIT, PDIP20
文件頁數(shù): 7/20頁
文件大小: 167K
代理商: TDA1591
1996 Sep 02
7
Philips Semiconductors
Product specification
PLL stereo decoder and noise blanker
TDA1591
Mono/stereo control (pins 16, 17 and 19)
V
i pilot(rms)
pilot threshold voltage for automatic switching
by pilot input voltage (RMS value)
stereo
on
stereo
off
8
0
24
20
2
30
1
mV
mV
dB
V
HYS
V
19
hysteresis of pilot threshold voltage
switching voltage for external mono control
(pin 19)
reference input voltage range (pin 17)
control voltage for channel separation due to
pin 17 (V
ref
)
V
ref
V
16-17
1
85
32
5
V
mV
mV
α
cs
= 6 dB; see Fig.5
α
cs
= 26 dB; see Fig.5
Pilot indicator logic level output (pin 18)
V
18
I
18
LOW voltage
HIGH current
I
18
=
200
μ
A
V
18
= 10 V
250
400
1
mV
μ
A
Muting (pin 8)
MUTE
att
mute attenuation (pin 8)
V
8
< 0.4 V
V
8
> 4 V
after muting
80
0.2
±
400
dB
dB
mV
V
O(offset)
DC offset voltage (pins 10 and 11)
HCC (pin 15)
CR
deem
control range of de-emphasis
for European standard
for USA standard
control voltage (pin 15 due to pin 17) in both
standards
see Figs 7 and 8
C
deem
= 6.8 nF
C
deem
= 10 nF
lower value CR
deem
upper value CR
deem
50
75
0
300
150
225
μ
s
μ
s
mV
mV
V
15-17
Noise interference detector
V
trigg
trigger threshold (pin 6)
f
int
= 120 kHz
V
8(DC)
= 7.7 V
V
8(DC)
= 6.7 V
V
6 trigg
= 10 mV
V
6 trigg
= 100 mV
10
100
200
2.3
40
20
mV
mV
mV
V
μ
s
nA
V
8
voltage offset as a function of V
trigg
t
sup
I
13,14
AF suppression time; pulse width
input offset current (pins 13 and 14)
during AF suppression
time
τ
pulse
= 10
μ
s
V
pulse
trigger sensitivity (pin 6)
10
mV
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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