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參數(shù)資料
| 型號： | TDA10023HT |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, 1 MM HEIGHT, PLASTIC, MS-026, SOT-357-1, TQFP-64 |
| 文件頁數(shù)： | 20/20頁 |
| 文件大?。?/td> | 101K |
| 代理商： | TDA10023HT |
9397 750 14559
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 April 2005
9 of 20
Philips Semiconductors
TDA10023HT
Single chip DVB-C/MCNS channel receiver
UNCOR
33
O
In DVB mode, uncorrectable transport stream packet. This
output signal is HIGH when the provided packet is
uncorrectable (during the 188 bytes of the packet). The
uncorrectable packet is not affected by the Reed-Solomon
decoder, but the MSB of the byte following the sync byte is
forced ‘1’ for the MPEG2 process: error ag indicator (if RSI and
IEI are set LOW in the I2C-bus table).
In MCNS mode, uncorrectable Reed-Solomon blocks. This
output signal is HIGH when the provided block is uncorrectable
(during the entire block). The uncorrectable block is not affected
by the Reed-Solomon decoder.
PSYNC
34
O
Pulse synchro output. This output signal goes HIGH when the
sync byte (47h) is provided (in DVB or MCNS modes), then it
goes LOW until the next sync byte.
Also by default (register TSOUT, index 1Eh), PSYNC is forced
LOW when UNCOR pin goes HIGH.
OCLK
35
O
Output clock output. OCLK is the output clock for the DO[7:0]
data outputs. OCLK is internally generated depending on which
interface is selected.
DEN
36
O
Data enable (in DVB/MCNS modes). This output signal is HIGH
when there is a valid data on output bus DO[7:0].
Also by default (register TSOUT, index 1Eh), DEN is forced
LOW when UNCOR pin goes HIGH.
DO[7:0]
37,38,
39,40,
45,46,
47,48
O
Data output bus. These 8-bit parallel data are the outputs of the
TDA10023HT after demodulation and FEC (DVB or MCNS)
decoder.
When one of the 3 possible parallel interfaces (A/B/C) is
selected (parameter INTPSEL = 00/01/10, index 20h) then
DO[7:0] is the transport stream output.
When the serial interface is selected (parameter INTPSEL = 11,
index 20h) then the serial output is on pin DO[0].
Also by default (register TSOUT, index 1Eh), in DVB or MCNS
mode, the TS data is forced to the null TS FFh when the
UNCOR pin goes HIGH.
VDDD3
41
S
digital core supply voltage 1.8 V
VSSD3
42
G
digital core ground
VDDD2
43
S
digital pad supply voltage 3.3 V
VSSD2
44
G
digital pad ground
VSSD1
49
G
ground return for the digital switching circuitry (ADC and PLL)
VDDD1
50
S
supply voltage for the digital switching circuitry 1.8 V (ADC and
PLL)
n.c.
51
not connected
n.c.
52
not connected
n.c.
53
not connected
n.c.
54
not connected
VDDA3
55
S
supply voltage for the analog circuits 3.3 V (ADC)
n.c.
56
not connected
Table 3:
Pin description …continued
Symbol
Pin
Type [1] Description
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| TDA1010AU | 6.4 W, 1 CHANNEL, AUDIO AMPLIFIER, PSFM9 |
| TDA1023T-T | SPECIALTY ANALOG CIRCUIT, PDSO16 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA10023HT/C1,518 | 制造商:Entropic Communications 功能描述:935273244518-R43 |
| TDA10025 | 制造商:NXP 功能描述:Dual cable demodulator |
| TDA10025HN/C1,518 | 功能描述:調(diào)節(jié)器/解調(diào)器 Dual Cable (QAM) Demodulator RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| TDA10025HN/C1,551 | 功能描述:調(diào)節(jié)器/解調(diào)器 DUAL CBL DEMODULATOR RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| TDA10025HN/C1,557 | 功能描述:調(diào)節(jié)器/解調(diào)器 DUAL CBL DEMODULATOR RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
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