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參數(shù)資料
| 型號(hào)： | TCM129C16ADW |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | Codec |
| 英文描述： | COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| 中文描述： | 聯(lián)合單芯片的PCM編解碼器和過濾器 |
| 文件頁數(shù)： | 24/25頁 |
| 文件大?。?/td> | 392K |
| 代理商： | TCM129C16ADW |
TCM29C13A, TCM29C14A, TCM29C16A, TCM29C17A,
TCM129C13A, TC,129C14A, TCM129C16A, TCM129C17A
COMBINED SINGLE-CHIP PCMCODEC AND FILTER
SCTS030E – AUGUST 1989 – REVISED OCTOBER 1996
24
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
receive output power amplifiers
A balanced-output amplifier allows maximum flexibility in output configuration. Either of the two outputs can be
used single ended (i.e., referenced to ANLG GND) to drive single-ended loads. Alternatively, the differential
output directly drives a bridged load. The output stage is capable of driving loads as low as 300-
single-ended
to a level of 12 dBm or 600
differentially to a level of 15 dBm.
The receive channel transmission level may be adjusted between specified limits by manipulation of GSR. GSR
is internally connected to an analog gain-setting network. When GSR is connected to PWRO–, the receive level
is maximum. When GSR is connected to PWRO+, the level is minimum. The output transmission level is
adjusted between 0 and –12 dB as GSR is adjusted (with an adjustable resistor) between PWRO+ and PWRO–.
Transmission levels are specified relative to the receive channel output under digital milliwatt conditions
(i.e., when the digital input at PCM IN is the eight-code sequence specified in CCITT recommendation G.711).
APPLICATION INFORMATION
output gain-set design considerations (see Figure 9)
PWRO+ and PWRO– are low-impedance complementary outputs. The voltages at the nodes are:
V
O+
at PWRO+
V
O–
at PWRO–
V
O
= V
O+
– V
O–
(total differential response)
R1 and R2 are a gain-setting resistor network with the center tap connected to the GSR input.
A value greater than 10 k
and less than 100 k
for R1 + R2 is recommended because of the following:
The parallel combination of R1 + R2 and R
L
sets the total loading.
The total capacitance at the GSR input and the parallel combination of R1 and R2 define a time constant that
has to be minimized to avoid inaccuracies.
V
A
represents the maximum available digital milliwatt output response (V
A
= 3.006 Vrms).
VOD = A
VA
where A =
1 + (R1/R2)
4 + (R1/R2)
PWRO+
GSR
PWRO–
2
4
3
R1
R2
VOD
VO
RL
PCM IN
TCM29C13A
TCM29C14A
TCM29C16A
TCM29C17A
TCM129C13A
TCM129C14A
TCM129C16A
TCM129C17A
VO–
Digital Milliwatt
Sequence Per
CCITT G. 711
Figure 10. Gain-Setting Configuration
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TCM129C13A | COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| TCM129C17A | COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| TCM129C17ADW | COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| TCM129C17AN | COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| TCM129C14A | Combined Single-Chip PCM Codec And Filter(單片PCM編碼譯碼器和濾波器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TCM129C16AN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| TCM129C16DW | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TCM129C16N | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TCM129C17 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
| TCM129C17A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:COMBINED SINGLE-CHIP PCM CODEC AND FILTER |
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