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參數(shù)資料
| 型號(hào)： | TC94A29FAG |
| 廠商： | Toshiba Corporation |
| 英文描述： | TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic |
| 中文描述： | 東芝的CMOS數(shù)字集成電路硅單片 |
| 文件頁(yè)數(shù)： | 3/20頁(yè) |
| 文件大小： | 282K |
| 代理商： | TC94A29FAG |
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TC94A29FAG/FB
2003-04-01
3
Pin Connections
TEZI
LQFP/QFP-64
(0.5/0.65-mm pitch)
Top view
D
L
D
S
R
D
D
C
S
X
X
C
D
D
F
S
T
R
T
F
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
25
26
24
23
22
21
20
19
18
17
49
50
51
52
53
54
57
58
60
61
62
63
64
55
56
59
1
2
4
7
10
11
12
13
14
15
16
3
5
6
RESET
P8-0/MXI/OSC (BRK1)
P8-1/MXO (BRK2)
P2-0/COM1
P2-1/COM2
P2-2/COM3
P2-3/COM4
TEST/P3-0/S1
P3-1/S2
P3-2/S3
P3-3/S4
P4-0/S5
P4-1/S6
P4-2/S7
P4-3/S8
P5-0/S9
P
P
P
P
P
P
P
M
D
M
S
P
P
P
P
P
P
P
TEI
SBAD
FEI
RFRP
RFZI
V
REF
AV
DD
RFI
SLCO
AV
SS
VCOF
LPFO
LPFN
TMAX
PDO
1-bit DAC
16.9344-MHz
oscillator
C
75-kHz /
32.768-kHz/CR
L
AD converter
Controller-dedicated pins
Serial interface 1
8
9
Pull-up/pull-down can be specified.
Reset input
T
CMOS I/O ports (up to 26 ports)
P
Also used for CD function
N-ch open-drain I/O
(3 pins, 5.5 V max.)
Serial interface 2
I
B
F
Note:
For BRK1 to BRK16, the backup state can be set to be released in
port units.
Note:
The TEST pin (pin 56) is pulled down during a reset, thus accepting
test mode input. Therefore, it should be applied low or left open
during a reset.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TC94A29FB | 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic |
| TC94A39 | 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:CMOS Digital Intergrated Circuit |
| TC94A39FAG | 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:Single-Chip CD Processor with Built-in Controller (CD-DX) |
| TC94A39FAG/FB | 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:CMOS Digital Intergrated Circuit |
| TC94A39FB | 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:Single-Chip CD Processor with Built-in Controller (CD-DX) |
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