參數(shù)資料
型號(hào): TC850
廠商: TelCom Semiconductor, Inc.
英文描述: 15-BIT, FAST-INTEGRATING CMOS ANALOG-TO-DIGITAL CONVERTER
中文描述: 15位,快速整合過(guò)程CMOS模擬數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù): 2/14頁(yè)
文件大?。?/td> 164K
代理商: TC850
3-78
TELCOM SEMICONDUCTOR, INC.
ABSOLUTE MAXIMUM RATINGS*
Positive Supply Voltage (V
DD
to GND)....................... +6V
Negative Supply Voltage (V
SS
to GND) .....................– 9V
Analog Input voltage (IN
+
or IN
) .....................V
DD
to V
SS
Voltage Reference Input
(REF
1+
, REF
1–
, REF
2+
)..............................V
DD
to V
SS
Logic Input Voltage ................ V
DD
+ 0.3V to GND – 0.3V
Current Into Any Pin.................................................10mA
While Operating ................................................100
μ
A
Ambient Operating Temperature Range
C Device ................................................0
°
C to +70
°
C
I Device.............................................– 25
°
C to +85
°
C
ELECTRICAL CHARACTERISTICS:
V
S
=
±
5V, f
CLK
= 61.44 kHz, V
FS
= 3.2768V, T
A
= 25
°
C, Fig. 1 Test Circuit,
unless otherwise specified.
Symbol Parameter
Test Conditions
Min
Typ
Max
Unit
Zero-Scale Error
End Point Linearity Error
Differential Nonlinearity
Input Leakage Current
V
IN
= 0V
–V
FS
V
IN
+V
FS
±
0.25
±
1
±
0.1
30
1.1
80
±
0.5
±
2
±
0.5
75
3
LSB
LSB
LSB
pA
I
IN
V
IN
= 0V, T
A
= 25
°
C
0
°
C
T
A
+70
°
C
– 25
°
T
A
+85
°
C
Over Operating Temperature Range
V
IN
= 0V, V
CM
=
±
1V
External Ref Temperature
Coefficient = 0 ppm/
°
C
0
°
C
T
A
+70
°
C
V
IN
= 0V
0
°
C
T
A
+70
°
C
V
IN
=
±
3.275V
nA
V
dB
V
CMR
CMRR
Common-Mode Voltage Range
Common-Mode Rejection Ratio
Full-Scale Gain Temperature
Coefficient
V
SS
+ 1.5
V
DD
– 1.5
2
5
ppm/
°
C
Zero-Scale Error
Temperature Coefficient
Full-Scale Magnitude
Symmetry Error
Input Noise
Positive Supply Current
Negative Supply Current
Output High Voltage
Output Low Voltage
Output Leakage Current
Input High Voltage
Input Low Voltage
Input Pull-Up Current
Input Pull-Down Current
Oscillator Output Current
Input Capacitance
Output Capacitance
Chip-Enable Access Time
Read-Enable Access Time
Data Hold From CS or CE
Data Hold From RD
OVR/POL Data Access Time
0.3
2
μ
V/
°
C
0.5
2
LSB
e
N
I
S+
I
S–
V
OH
V
OL
I
OP
V
IH
Not Exceeded 95% of Time
3.5
3.5
30
2
2
4.9
0.15
0.1
2.3
2.1
4
14
140
1
15
230
190
250
210
140
3.5
3.5
0.4
1
1
450
450
450
450
300
μ
V
P-P
mA
mA
V
V
μ
A
V
V
μ
A
μ
A
μ
A
pF
pF
nsec
nsec
nsec
nsec
nsec
I
O
= 500
μ
A
I
O
= 1.6 mA
Pins 8 – 15, High-Impedance State
Note 3
Note 3
Pins 2, 3, 4, 6, 7; V
IN
= 0V
Pins 1, 5; V
IN
= 5V
Pin 18, V
OUT
= 2.5V
Pins 1 – 7, 17
Pins 8 – 15, High-Impedance State
CS or CE, RD = LOW (Note 1)
CS = HIGH, CE = LOW (Note 1)
RD = LOW (Note 1)
CS = HIGH, CE = LOW (Note 1)
CS = HIGH, CE = LOW, RD = LOW (Note 1)
IL
I
PU
I
PD
I
OSC
C
IN
C
OUT
t
CE
t
RE
t
DHC
t
DHR
t
OP
Lead Temperature (Soldering, 10 sec) .................+300
°
C
Package Power Dissipation (T
A
70
°
C)
CerDIP ..............................................................2.29W
Plastic DIP ........................................................1.23W
Plastic PLCC ....................................................1.23W
*Static-sensitive device. Unused devices must be stored in conductive
material. Protect devices from static discharge and static fields. Stresses
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied.
Exposure to Absolute Maximum Rating Conditions for extended periods
may affect device reliability.
15-BIT, FAST-INTEGRATING CMOS
ANALOG-TO-DIGITAL CONVERTER
TC850
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