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參數(shù)資料
| 型號(hào)： | TC835 |
| 廠商： | TelCom Semiconductor, Inc. |
| 英文描述： | PERSONAL COMPUTER DATA ACQUISITION A/D CONVERTER |
| 中文描述： | 個(gè)人計(jì)算機(jī)數(shù)據(jù)采集的A / D轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大?。?/td> | 206K |
| 代理商： | TC835 |
3-70
TELCOM SEMICONDUCTOR, INC.
PERSONAL COMPUTER
DATA ACQUISITION A/D CONVERTER
TC835
System Zero
(Figure 3B)
During this phase, errors due to buffer, integrator, and
comparator offset voltages are compensated for by charg-
ing C
AZ
(auto-zero capacitor) with a compensating error
voltage. With a zero input voltage the integrator output will
remain at zero.
The external input signal is disconnected from the
internal circuitry by opening the two SW
I
switches. The
internal input points connect to ANALOG COMMON. The
reference capacitor charges to the reference voltage poten-
tial through SW
R
. A feedback loop, closed around the
integrator and comparator, charges the C
AZ
capacitor with a
voltage to compensate for buffer amplifier, integrator, and
comparator offset voltages.
Analog Input Signal Integration
(Figure 3C)
The TC835 integrates the differential voltage between
the +INPUT and –INPUT pins. The differential voltage must
be within the device common-mode range; - 1V from either
supply rail, typically.
The input signal polarity is determined at the end of this
phase.
Reference Voltage Integration
(Figure 3D)
The previously-charged reference capacitor is con-
nected with the proper polarity to ramp the integrator output
back to zero. The digital reading displayed is:
[
Reading = 10,000
.
]
Table 1. Internal Analog Gate Status
Conversion
Cycle Phase
Reference
Schematic
SW
I
SW
RI
SW
RI
SW
Z
SW
R
SW
1
SW
IZ
System Zero
Input Signal
Integration
Reference Voltage
Integration
Integrator
Output Zero
Closed
Closed
Closed
3B
3C
Closed
Closed*
Closed
3D
Closed
Closed
3E
*NOTE:
Assumes a positive polarity input signal. SW
RI
would be closed for a negative input signal.
Internal Analog Gate Status
+
–
Integrator Output Zero
(Figure 3E)
This phase guarantees the integrator output is at 0V
when the system zero phase is entered and that the true
system offset voltages are compensated for. This phase
normally lasts 100 to 200 clock cycles. If an overrange
condition exists, the phase is extended to 6200 clock cycles.
Analog Section Functional Description
(In Reference to the 28-Pin Plastic Package)
Differential Inputs
(+INPUT, Pin 10 and –INPUT, Pin 9)
The TC835 operates with differential voltages within the
input amplifier common-mode range. The input amplifier
common-mode range extends from 0.5V below the positive
supply to 1V above the negative supply. Within this com-
mon-mode voltage range, an 86 dB common-mode rejec-
tion ratio is typical.
The integrator output also follows the common-mode
voltage. The integrator output must not be allowed to satu-
rate. A worst-case condition exists, for example, when a
large positive common-mode voltage with a near full-scale
negative differential input voltage is applied. The negative
input signal drives the integrator positive when most of its
swing has been used up by the positive common-mode
voltage. For these critical applications the integrator swing
can be reduced to less than the recommended 4V full-scale
swing, with some loss of accuracy. The integrator output can
swing within 0.3V of either supply without loss of linearity.
ANALOG COMMON Input
(Pin 3)
ANALOG COMMON is used as the –INPUT return
during auto-zero and deintegrate. If –INPUT is different from
ANALOG COMMON, a common-mode voltage exists in the
system. This signal is rejected by the excellent CMRR of the
converter. In most applications, –INPUT will be set at a fixed,
known voltage (power supply common, for instance). In this
application, ANALOG COMMON should be tied to the same
point, thus removing the common-mode voltage from the
converter. The reference voltage is referenced to ANALOG
COMMON.
REFERENCE Voltage Input
(REF IN, Pin 2)
The REF IN input must be a positive voltage with respect
to ANALOG COMMON. Two reference voltage circuits are
shown in Figure 5.
Differential Input
V
REF
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