參數(shù)資料
型號： TC820CLW
廠商： TelCom Semiconductor, Inc.
元件分類： 通用總線功能
英文描述： 3-3/4 DIGIT A/D CONVERTER WITH FREQUENCY COUNTER AND LOGIC PROBE
中文描述： 3-3/4數(shù)字A / D轉(zhuǎn)換頻率計(jì)數(shù)器和邏輯探針轉(zhuǎn)爐
文件頁數(shù)： 20/22頁
文件大?。?/td> 275K
代理商： TC820CLW
3-168
TELCOM SEMICONDUCTOR, INC.
3-3/4 A/D CONVERTER WITH
FREQUENCY COUNTER
AND LOGIC PROBE
TC820
Figure 22. Window Comparator Logic Probe
acitors added across the input pull-down resistors to stretch
the input pulse and permit viewing short-duration input
pulses.
External Peak Detection
The TC820 will hold the highest A/D conversion or
frequency reading indefinitely when the PK HOLD input is
connected to V
DD
. However, the analog peak input must be
present during the A/D converter's signal integrate period.
For slowly changing signals, such as temperature, the peak
reading will be properly converted and held.
If rapidly changing analog signals must be held, an
external peak detector should be added. An inexpensive
circuit can be made from an op amp and a few discrete
components, as shown in Figure 23. The droop rate of the
external peak detector should be adjusted so that the held
voltage will not decay below the desired accuracy level
during the converter's 400msec conversion time.
Liquid Crystal Display (LCD)
The TC820 drives a triplex (multiplexed 3:1) LCD with
three backplanes. The LCD can include decimal points,
polarity sign, and annunciators for overrange, peak hold,
high and low logic levels, and low battery. Table IV shows the
assignment of the display segments to the backplanes and
segment drive lines. The backplane drive frequency is
obtained by dividing the oscillator frequency by 240.
Backplane waveforms are shown in Figure 24. These
appear on outputs BP1, BP2, and BP3. They remain the
same regardless of the segments being driven.
Other display output lines have waveforms that vary
+
–
V
DD
TC820
R1
DP1/HI
LOGIC
DP0/LO
DGND
1N4148
1N4148
+9V
V
L
R2
R3
1M
1M
LOGIC
PROBE
INPUT
NOTE:
Select R1, R2, R3 for desired logic thresholds.
+
–
V
H
depending on the displays values. Figure 25 shows a set of
waveforms for the a, g, d outputs of one digit for several
combinations of "on" segments.
Figure 23. External Peak Detector
V
DD
TC820
+
–
TL061
V
SS
V
+
IN
PK HOLD
0V
0.01
μ
F
OFFSET
NULL
1N4148
+9V
10k
V
IN
Table IV. LCD Backplane and Segment Assignments
44-Pin
Flat Pkg
Pin No.
LCD
Display
Pin No.
40-Pin DIP
Pin No.
BP1
BP2
BP3
1
40
3
LOW
"—"
E4
2
41
4
A4
G4
D4
3
42
5
B4
C4
DP3
4
43
6
HIGH
F3
E3
5
44
7
A3
G3
D3
6
1
8
B3
C3
DP2
7
2
9
OVER
F2
E2
8
3
10
A2
G2
D2
9
4
11
B2
C2
DP1
10
5
12
PEAK
F1
E1
11
6
13
A1
G1
D1
12
7
14
B1
C1
BATT
13
8
2,16*
—
—
BP3
14
9
1
—
BP2
—
15
10
15
BP1
—
—
*Connect both pins 2 and 16 of LCD to TC820 BP3 output.
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