參數(shù)資料
型號(hào): TC7MP3125FTG
廠商: Toshiba Corporation
英文描述: Low Voltage/Low Power 2-Bit 】 2 Dual Supply Bus Transceiver
中文描述: 低電壓/低功率2位】2雙電源總線收發(fā)器
文件頁(yè)數(shù): 17/23頁(yè)
文件大小: 338K
代理商: TC7MP3125FTG
TC7MP3125FK/FTG
2007-10-19
17
V
CCA
=
1.2
±
0.1 V, V
CCB
=
2.5
±
0.2 V
Characteristics
Symbol
Test Condition
Min
Max
Unit
Propagation delay time
(Bn
An)
t
pLH
t
pHL
Figure 1, Figure 2
1.0
60
3-state output enable time
(OE
An)
t
pZL
t
pZH
Figure 1, Figure 3
1.0
95
3-state output disable time
(
OE
An)
t
pLZ
t
pHZ
Figure 1, Figure 3
1.0
45
ns
Propagation delay time
(An
Bn)
t
pLH
t
pHL
Figure 1, Figure 2
1.0
23
3-state output enable time
(
OE
Bn)
t
pZL
t
pZH
Figure 1, Figure 3
1.0
54
3-state output disable time
(OE
Bn)
t
pLZ
t
pHZ
Figure 1, Figure 3
1.0
17
ns
Output to output skew
t
osLH
t
osHL
(Note)
1.5
ns
Note: Parameter guaranteed by design.
(t
osLH
=
|t
pLHm
t
pLHn
|, t
osHL
=
|t
pHLm
t
pHLn
|)
V
CCA
=
1.2
±
0.1 V, V
CCB
=
1.8
±
0.15 V
Characteristics
Symbol
Test Condition
Min
Max
Unit
Propagation delay time
(Bn
An)
t
pLH
t
pHL
Figure 1, Figure 2
1.0
58
3-state output enable time
(OE
An)
t
pZL
t
pZH
Figure 1, Figure 3
1.0
92
3-state output disable time
(OE
An)
t
pLZ
t
pHZ
Figure 1, Figure 3
1.0
47
ns
Propagation delay time
(An
Bn)
t
pLH
t
pHL
Figure 1, Figure 2
1.0
30
3-state output enable time
(OE
Bn)
t
pZL
t
pZH
Figure 1, Figure 3
1.0
55
3-state output disable time
(OE
Bn)
t
pLZ
t
pHZ
Figure 1, Figure 3
1.0
17
ns
Output to output skew
t
osLH
t
osHL
(Note)
1.5
ns
Note: Parameter guaranteed by design.
(t
osLH
=
|t
pLHm
t
pLHn
|, t
osHL
=
|t
pHLm
t
pHLn
|)
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