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參數(shù)資料
| 型號： | TC7MH573FK |
| 廠商： | Toshiba Corporation |
| 英文描述： | Octal D-Type Latch with 3-State Output |
| 中文描述： | 八路D類鎖存器與三態(tài)輸出 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 199K |
| 代理商： | TC7MH573FK |
TC7MH573FK
2007-10-19
4
Electrical Characteristics
DC Characteristics
Ta
=
25°C
Ta
=
40~85°C
Characteristics
Symbol
Test Condition
V
CC
(V)
Min
Typ.
Max
Min
Max
Unit
2.0
1.50
1.50
High level
V
IH
3.0~5.5
V
CC
×
0.7
V
CC
×
0.7
2.0
0.50
0.50
Input voltage
Low level
V
IL
3.0~5.5
V
CC
×
0.3
V
CC
×
0.3
V
2.0
1.9
2.0
1.9
3.0
2.9
3.0
2.9
I
OH
=
50
μ
A
4.5
4.4
4.5
4.4
I
OH
=
4 mA
3.0
2.58
2.48
High level
V
OH
V
IN
=
V
IH
or V
IL
I
OH
=
8 mA
4.5
3.94
3.80
2.0
0
0.1
0.1
3.0
0
0.1
0.1
I
OL
=
50
μ
A
4.5
0
0.1
0.1
I
OL
=
4 mA
3.0
0.36
0.44
Output
voltage
Low level
V
OL
V
IN
=
V
IH
or V
IL
I
OL
=
8 mA
4.5
0.36
0.44
V
3-state output off-state current
I
OZ
V
IN
=
V
IH
or V
IL
V
OUT
=
V
CC
or GND
5.5
±
0.25
±
2.50
μ
A
Input leakage current
I
IN
V
IN
=
5.5 V or GND
0~5.5
±
0.1
±
1.0
μ
A
Quiescent supply current
I
CC
V
IN
=
V
CC
or GND
5.5
4.0
40.0
μ
A
Timing Requirements
(Input: t
r
=
t
f
=
3 ns)
Ta
=
25°C
Ta
=
40~85°C
Characteristics
Symbol
Test Condition
V
CC
(V)
Typ.
Limit
Limit
Unit
3.3
±
0.3
5.0
5.0
Minimum pulse width
(LE)
t
w (H)
5.0
±
0.5
5.0
5.0
ns
3.3
±
0.3
3.5
3.5
Minimum set-up time
t
s
5.0
±
0.5
3.5
3.5
ns
3.3
±
0.3
1.5
1.5
Minimum hold time
t
h
5.0
±
0.5
1.5
1.5
ns
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| TC7MH574FK | 制造商:Toshiba America Electronic Components 功能描述:Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin VSSOP |
| TC7MH574FK_07 | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:Octal D-Type Flip-Flop with 3-State Output |
| TC7MH595FK | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:8-Bit Shift Register/Latch (3-State) |
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| TC7MH595FK_07 | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:8-Bit Shift Register/Latch (3-State) |
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