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參數(shù)資料
| 型號： | TC7MET373AFK |
| 廠商： | Toshiba Corporation |
| 英文描述： | Octal D-Type Latch with 3-State Output |
| 中文描述： | 八路D類鎖存器與三態(tài)輸出 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大?。?/td> | 194K |
| 代理商： | TC7MET373AFK |
TC7MET373AFK
2007-10-19
5
AC Electrical Characteristics
(Input: t
r
=
t
f
=
3 ns)
Ta
=
25°C
Ta
=
40~85°C
Characteristics
Symbol
Test Condition
V
CC
(V)
C
L
(pF)
Min
Typ.
Max
Min
Max
Unit
15
7.7
12.3
1.0
13.5
Propagation delay time
(LE-Q)
t
pLH
t
pHL
5.0
±
0.5
50
8.5
13.3
1.0
14.5
ns
15
5.1
8.5
1.0
9.5
Propagation delay time
(D-Q)
t
pLH
t
pHL
5.0
±
0.5
50
5.9
9.5
1.0
10.5
ns
15
6.3
10.9
1.0
12.5
3-state output enable time
t
pZL
t
pZH
R
L
=
1 k
Ω
5.0
±
0.5
50
7.1
11.9
1.0
13.5
ns
3-state output disable time
t
pLZ
t
pHZ
R
L
=
1 k
Ω
5.0
±
0.5
50
8.8
11.2
1.0
12.0
ns
Output to output skew
t
osLH
t
osHL
(Note 1) 5.0
±
0.5
50
1.0
1.0
ns
Input capacitance
C
IN
4
10
10
pF
Output capacitance
C
OUT
9
pF
Power dissipation
capacitance
C
PD
(Note 2)
25
pF
Note 1: Parameter guaranteed by design.
t
osLH
=
|t
pLHm
t
pLHn
|, t
osHL
=
|t
pHLm
t
pHLn
|
Note 2: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr)
=
C
PD
V
CC
f
IN
+
I
CC
/8 (per latch)
And the total C
PD
when n pcs. of latch operate can be gained by the following equation:
C
PD
(total)
=
14
+
11
n
Noise Characteristics
(Input: t
r
=
t
f
=
3 ns)
Ta
=
25°C
Characteristics
Symbol
Test Condition
V
CC
(V)
Typ.
Limit
Unit
Quiet output maximum dynamic V
OL
V
OLP
C
L
=
50 pF
5.0
1.1
1.5
V
Quiet output minimum dynamic V
OL
V
OLV
C
L
=
50 pF
5.0
1.1
1.5
V
Minimum high level dynamic input voltage V
IH
V
IHD
C
L
=
50 pF
5.0
2.0
V
Maximum low level dynamic input voltage V
IL
V
ILD
C
L
=
50 pF
5.0
0.8
V
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