參數(shù)資料
型號: TC74ACT112P
廠商: Toshiba Corporation
英文描述: CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip Flop with Preset and Clear
中文描述: CMOS數(shù)字集成電路硅單片雙JK觸發(fā)器拖鞋與預(yù)置和清除
文件頁數(shù): 3/9頁
文件大小: 318K
代理商: TC74ACT112P
TC74ACT112P/F/FN
2007-10-01
3
Absolute Maximum Ratings (Note 1)
Characteristics
Symbol
Rating
Unit
Supply voltage range
V
CC
0.5 to 7.0
V
DC input voltage
V
IN
0.5 to V
CC
+
0.5
V
DC output voltage
V
OUT
0.5 to V
CC
+
0.5
V
Input diode current
I
IK
±
20
mA
Output diode current
I
OK
±
50
mA
DC output current
I
OUT
±
50
mA
DC V
CC
/ground current
I
CC
±
100
mA
Power dissipation
P
D
500 (DIP) (Note 2)/180 (SOP)
mW
Storage temperature
T
stg
65 to 150
°C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta
=
40 to 65°C. From Ta
=
65 to 85°C a derating factor of
10 mW/°C should be
applied up to 300 mW.
Operating Ranges (Note)
Characteristics
Symbol
Rating
Unit
Supply voltage
V
CC
4.5 to 5.5
V
Input voltage
V
IN
0 to V
CC
V
Output voltage
V
OUT
0 to V
CC
V
Operating temperature
T
opr
40 to 85
°C
Input rise and fall time
dt/dV
0 to 10
ns/V
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
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