參數(shù)資料
型號: TC7135CPI
元件分類: ADC
英文描述: 1-CH 9-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 3/16頁
文件大?。?/td> 217K
代理商: TC7135CPI
11
TC7135
4-1/2 DIGIT
ANALOG-TO-DIGITAL CONVERTER
TC7135-10 9/27/99
Zero-Crossing Flip-Flop
The flip-flop interrogates data once every clock pulse
after transients of the previous clock pulse and half-clock
pulse have died down. False zero-crossings caused by
clock pulses are not recognized. Of course, the flip-flop
delays the true zero-crossing by up to one count in every
instance, and if a correction were not made, the display
would always be one count too high. Therefore, the counter
is disabled for one clock pulse at the beginning of the
reference integrate (deintegrate) phase. This one-count
delay compensates for the delay of the zero-crossing flip-
flop, and allows the correct number to be latched into the
display. Similarly, a one-count delay at the beginning of
auto-zero gives an overload display of 0000 instead of 0001.
No delay occurs during signal integrate, so true ratiometric
readings result.
Generating a Negative Supply
A negative voltage can be generated from the positive
supply by using a TC7660. (See Figure 9.)
TC7660
TC7135
11
1
+5V
8
23
(–5V)
V
+
V
24
10F
5
4
10F
+
Figure 9. Negative Supply Voltage Generator
TYPICAL APPLICATIONS
R2
R1
fO
GATES ARE 74C04
C
+5V
VOUT
390pF
30k
7
8
2
3
16k
0.22
F
16k
4
1k
1
+5V
VOUT
2
3
1
4
7
6
R2
100k
R2
100k
R3
50k
C2
10pF
R4
2k
C1
0.1
F
+
LM311
+
LM311
56k
Comparator Clock Circuit
RC Oscillator Circuit
1. fO
, RP =
a. If R = R1 = R2, f 0.55/RC
b. If R2 >> R1, f 0.45/R1C
c. If R2 << R1, f 0.72/R1C
2. Examples:
a. f = 120 kHz, C = 420 pF
R1 = R2 ≈ 10.9 k
b. f = 120 kHz, C = 420 pF, R2 = 50 k
R1 = 8.93 k
c. f = 120 kHz, C = 220 pF, R2 = 5 k
R1 = 27.3 k
1
2 C[0.41 RP + 0.70 R1]
R1 R2
R1 + R2
相關(guān)PDF資料
PDF描述
TC7135CBURT 1-CH DUAL-SLOPE ADC, ACCESS, PQFP64
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