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參數(shù)資料
| 型號： | TC3405VQRTR |
| 元件分類： | ADC |
| 英文描述： | 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16 |
| 封裝： | QSOP-16 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大小： | 68K |
| 代理商： | TC3405VQRTR |
4
16-Bit Low Cost, Low Power
∑ – A/D Converter
TC3405
TC3405-1 12/7/99
PIN DESCRIPTION
TC3405
Pin No.
Name
Description
1
IN1
+
Analog Input. This is the positive terminal of a true differential input consisting of
IN1
+ and IN1– . VIN(1) = (IN1+ – IN1–). (See Electrical Characteristics.)
2IN1
–
Analog Input. This is the negative terminal of a true differential input consisting of
IN1
+ and IN1– . VIN(1) = (IN1+ – IN1–) IN1– can swing to, but not below,
ground. (See
Electrical Characteristics.)
3,4,5
INn
Analog Input. This is the positive terminal of a true differential input with the
negative input tied internally to GND.
(See Electrical Characteristics.)
6VTH
Analog Input. This is the positive input to the internal comparator used to monitor
the voltage supply. The negative input is tied to an internal reference. When
VTH falls below the internal reference, the reset generator drives RESET low as
specified in the
Electrical Characteristics section.
7
REFIN
Analog Input. The converter’s reference voltage is the differential between this pin
and ground times two. It may be tied directly to REFOUT or scaled using a resistor
divider. Any user supplied reference voltage or the power supply rail may be used
in place of REFOUT.
8
GND
Ground Terminal.
9
REFOUT
Analog Output. The internal reference connects to this pin. It may be scaled
externally, if desired, and tied to the REFIN input to provide the converter’s
reference voltage. Care must be taken in connecting external circuitry to this pin.
This pin is in a high impedance state during the sleep mode. R3 in the Typical
Application must be 390
10%.(See Electrical Characteristics.)
10
SDAT
Digital Output (push-pull). This is the MicroPort serial data output. SDAT is
driven low while the TC3405 is converting data, effectively providing a “busy”
signal. After the conversion is complete, every high-to-low transition on the SCLK
pin puts a bit from the resulting data word on the SDAT pin (from MSB to LSB).
11
ENABLE
Digital Input. When this input control is pulled low, the part is internally restarted.
That is, any data conversion or data read sequence is cleared and the part goes
into sleep mode. When ENABLE returns high, the part resumes normal operation.
12
RESET
Digital Output (open drain). This is the output of the VDD monitor reset generator.
RESET is driven low when a power-on reset or brown-out condition is
detected. (See
AC Electrical Characteristics.)
13
A1
Digital Input. Controls analog multiplexer in conjunction with A0 to select one of four
Input channels. This address is latched at the falling edge of the SCLK, which starts
an A/D conversion. A1,A0 = 00 = Input 1; 01 = Input 2; 10 = Input 3; 11 = Input 4.
14
A0
Digital Input. Controls analog multiplexer in conjunction with A1 to select one of four
Input channels. This address is latched at the falling edge of the SCLK, which starts
an A/D conversion. A1,A0 = 00 = Input 1; 01 = Input 2; 10 = Input 3; 11 = Input 4.
15
SCLK
Digital Input. This is the MicroPort serial clock input.The TC3405 comes out of
sleep mode and a conversion cycle begins when this pin is driven low. After the
conversion starts, each additional falling edge (up to six) detected on SCLK for t4
seconds reduces the A/D resolution by one bit. When the conversion is complete,
the data word can be shifted out on the SDAT pin by clocking the SCLK pin.
16
VDD
Power Supply Input.
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