參數(shù)資料
型號(hào): TC3404VQRRT
元件分類: ADC
英文描述: 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16
封裝: QSOP-16
文件頁數(shù): 8/13頁
文件大?。?/td> 81K
代理商: TC3404VQRRT
4
TC3404
TC3404-1 3/30/00
+1.8V, Low Power, Quad-Input,
16-Bit
A/D Converter with
a Power Fault Monitor
2001 Microchip Technology Inc.
DS21413A
PIN DESCRIPTION
TC3404
Pin No.
Name
Description
1,2
INn
+
Analog Input. This is the positive terminal of a true differential input with
the negative input tied internally to GND. (See Electrical Characteristics.)
3,5
INn
+
Analog Input. This is the positive terminal of a true differential input
consisting of INn
+ and INn. VIN(n) = (INn+ – INn).(See Electrical Characteristics.)
4,6
INn
Analog Input. This is the negative terminal of a true differential input
consisting of INn
+ and INn. VIN(n) = (INn+ – INn) INncan swing to,
but not below, ground. (See Electrical Characteristics.)
7
REFIN
Analog Input. The converter’s reference voltage is the differential
between this pin and ground times two. It may be connected to
REFOUT as shown on page 1 or scaled using a resistor divider. Any user supplied
reference voltage or the power supply rail may be used in place of REFOUT.
8
GND
Ground Terminal.
9
REFOUT
Analog Output. The internal reference connects to this pin. It may be
scaled externally, if desired, and tied to the REFIN input to provide the
converter’s reference voltage. Care must be taken in connecting
external circuitry to this pin. (See Electrical Characteristics.)
10
SDAT
Digital Output (push-pull). This is the MicroPort serial data output.
SDAT is driven low while the TC3404 is converting data, effectively
providing a “busy” signal. After the conversion is complete, every high-
to-low transition on the SCLK pin puts a bit from the resulting data word
on the SDAT pin (from MSB to LSB).
11
PFO
Digital Output (open drain). This is the output of the internal threshold
detector. When PFI is less than the internal reference, PFO is driven low.
12
PFI
Analog Input. This is the positive input to an internal comparator used as a threshold
detector. The negative input is tied to an internal reference.
13
A1
Digital Input. Controls analog multiplexer in conjunction with A0 to select
one of the four Input channels. This address is latched at the falling edge
of the SCLK, which starts an A/D conversion. A1,A0 = 00 = Input 1;
01 = Input 2; 10 = Input 3; 11 = Input 4.
14
A0
Digital Input. Controls analog multiplexer in conjunction with A1 to select
one of four Input channels. This address is latched at the falling edge of
the SCLK, which starts an A/D conversion. A1,A0 = 00 = Input 1;
01 = Input 2; 10 = Input 3; 11 = Input 4.
15
SCLK
Digital Input. This is the MicroPort serial clock input. After the conversion
starts, each additional falling edge (up to six) detected on SCLK for t4 seconds
reduces the A/D resolution by one bit. When the conversion is complete, the
data word can be shifted out on the SDAT pin by clocking the SCLK pin.
16
VDD
Power Supply Input. (See Electrical Characteristics.)
相關(guān)PDF資料
PDF描述
TC3404VQRTR 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16
TC3404VPE 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP16
TC3404VQR 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16
TC3405VPE 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP16
TC3405VQR 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16
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