參數(shù)資料
型號(hào)： TC14433AEJG
元件分類(lèi)： ADC
英文描述： 1-CH 3-BIT DUAL-SLOPE ADC, SERIAL ACCESS, CDIP24
封裝： CERAMIC, DIP-24
文件頁(yè)數(shù)： 15/20頁(yè)
文件大?。?/td> 356K
代理商： TC14433AEJG
TC14433/A
DS21394C-page 4
2006 Microchip Technology Inc.
Digital
VOL
Output Voltage
(Pins 14 to 23) (Note 3)
—
0
0.05
—
0.05
V
VSS = 0V, “0” Level
—
-5
-4.95
—
-4.95
V
VSS = -5V, “0” Level
VOH
Output Voltage
(Pins 14 to 23) (Note 3)
4.95
5
—
4.95
—
V
VSS = 0V, “1” Level
4.95
5
—
4.95
—
V
VSS = -5V, “1” Level
IOH
Output Current
(Pins 14 to 23)
-0.2
-0.36
—
-0.14
—
mA
VSS = 0V, VOH = 4.6V
Source
- 0.5
-0.9
—
-0.35
—
mA
VSS = -5V, VOH = 5V
Source
IOL
Output Current
(Pins 14 to 23)
0.51
0.88
—
0.36
—
mA
VSS = 0V, VOL = 0.4V
Sink
1.3
2.25
—
0.9
—
mA
VSS = -5V,
VOL = -4.5V Sink
fCLK
Clock Frequency
—
66
—
kHz
RC = 300 kΩ
IDU
Input Current -DU
—
±0.00
001
±0.3
—
±1
μA
Power
IQ
Quiescent Current: 14433A:
—
VDD to VEE, ISS = 0
—0.4
2
—
3.7
mA
VDD = 5, VEE = -5
—
1.4
4
—
7.4
mA
VDD = 8, VEE = -8
Quiescent Current: 14433:
—
VDD to VEE, ISS = 0
—0.9
2
—
3.7
mA
VDD = 5, VEE = -5
—
1.8
4
—
7.4
mA
VDD = 8, VEE = -8
PSRR
Supply Rejection
—
0.5
—
mV/V
VDD to VEE, ISS = 0,
VREF = 2V,
VDD = 5, VEE = -5
TABLE 1-1:
TC14433/A ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: VDD = +5V, VEE = -5V, C1 = 0.1 μF, (Mylar), C0 = 0.1 μF, RC = 300 kΩ, R1 = 470 kΩ @ VREF = 2V, R1 =
27 k
Ω @ VREF = 200 mV, TA = 25°C, unless otherwise specified.
Symbol
Parameter
Min
Typ
Max
Min
Typ
Max
Units
Test Conditions
Note
1:
Accuracy – The accuracy of the meter at full scale is the accuracy of the setting of the reference voltage. Zero is
recalculated during each conversion cycle. The meaningful specification is linearity. In other words, the deviation from
correct reading for all inputs other than positive full scale and zero is defined as the linearity specification.
2:
The LSD stability for 200 mV scale is defined as the range that the LSD will occupy 95% of the time.
3:
Pin numbers refer to 24-pin PDIP.
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