參數(shù)資料
型號: TC1321EOATR
廠商: Microchip Technology
文件頁數(shù): 22/24頁
文件大?。?/td> 0K
描述: IC DAC 10BIT 2WIRE I2C 8SOIC
標準包裝: 3,300
設(shè)置時間: 10µs
位數(shù): 10
數(shù)據(jù)接口: I²C
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極
采樣率(每秒): *
2010 Microchip Technology Inc.
DS21387C-page 7
TC1321
3.0
DETAILED DESCRIPTION
The TC1321 is a monolithic 10-bit digital-to-analog
converter that is designed to operate from a single
supply that can range from 2.7V to 5.5V. The DAC
consists of a data register (DATA), a configuration
register (CONF), and a current output amplifier. The
TC1321 uses an external reference which also
determines the maximum output voltage.
The TC1321 uses a current steering DAC based on an
array of matched current sources. This current, along
with a precision resistor, converts the contents of the
DATA Register and VREF into an output voltage, VOUT,
that is given by:
3.1
Reference Input
The reference pin, VREF, is a buffered high-impedance
input. Because of this, the load regulation of the
reference source needs only to be able to tolerate
leakage levels of current (less than 1 A). VREF
accepts a voltage range from 0 to (VDD – 1.2V). Input
capacitance is typically 10 pF.
3.2
Output Amplifier
The TC1321 DAC output is buffered with an internal
unity gain rail-to-rail input/output amplifier with a typical
slew rate of 0.8V/s. Maximum full scale transition
settling time is 10 sec to within ±1/2LSB when loaded
with 1 k
in parallel with 100 pF.
3.3
Standby Mode
The TC1321 allows the host to put it into a Low Power
(IDD = 0.5 A, typically) Standby mode.
In this mode, the D/A conversion is halted. The SMBus
port operates normally. Standby mode is enabled by
setting the SHDN bit in the CONFIG register. Table 3-1
summarizes this operation.
TABLE 3-1:
STANDBY MODE OPERATION
3.4
SMBus Slave Address
The TC1321 is internally programmed to have a default
SMBus address value of 1001 000b. Seven other
addresses are available by custom order (contact
Figure 3-1 for the location of address bits in SMBus
protocol.
VOUT V
=
REF
DATA
1024
----------------
SHDN Bit
Operating Mode
0
Normal
1
Standby
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