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17-1
17-2
17-2
18-1
18-2
18-3
19-1
19-2
19-3
19-4
19-5
19-6
19-7
19-8
19-9
20-1
20-2
20-3
21-1
21-2
21-3
21-4
21-5
22-1
22-2
22-3
22-4
VLD Control Register (VLDCON)...............................................................................17-1
Block Diagram for Voltage Level Detect.....................................................................17-2
Voltage Level Detect Circuit and Control Register.....................................................17-3
Pattern Generation Flow.............................................................................................18-1
PG Control Register (PGCON)...................................................................................18-2
Pattern Generation Circuit Diagram ...........................................................................18-2
Input Timing for External Interrupts (Ports 0).............................................................19-5
Input Timing for
..............................................................................................19-5
Stop Mode Release Timing Initiated by
Stop Mode(main) Release Timing Initiated by Interrupts ...........................................19-7
Stop Mode(sub) Release Timing Initiated by Interrupts .............................................19-7
Recommended A/D Converter Circuit for Highest Absolute Accuracy.......................19-9
Clock Timing Measurement at XIN............................................................................19-11
LVR (Low Voltage Reset) Timing...............................................................................19-13
Operating Voltage Range...........................................................................................19-14
..........................................................19-6
64-SDIP-750 Package Dimensions............................................................................20-1
64-QFP-1420F Package Dimensions.........................................................................20-2
64-LQFP-1010-AN Package Dimensions...................................................................20-3
S3F8235 Pin Assignments (64-SDIP Package).........................................................21-2
S3F8235 Pin Assignments (64-QFP Package)..........................................................21-3
S3F8235 Pin Assignments (64-LQFP Package)........................................................21-4
LVR (Low Voltage Reset) Timing...............................................................................21-9
Operating Voltage Range...........................................................................................21-10
SMDS Product Configuration (SMDS2+) ...................................................................22-2
TB8238/5 Target Board Configuration ......................................................................22-3
40-Pin Connectors (J101, J102) for TB8238/5...........................................................22-6
S3C8238/C8235/F8235 Probe Adapter Cables for 64-QFP Package .......................22-6