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參數(shù)資料
| 型號： | TB62709NG_06 |
| 廠商： | Toshiba Corporation |
| 英文描述： | 7−SEGMENT DRIVERS WITH BUILT−IN DECODERS (COMMON ANODE CAPABILITY, MAXIMUM 4−DIGIT CONTROL) |
| 文件頁數(shù)： | 4/29頁 |
| 文件大?。?/td> | 576K |
| 代理商： | TB62709NG_06 |
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TB62709NG/FG
2006-06-14
4
TIMING DIAGRAM
DATA INPUT
z
Transfer data to the DATA
IN pin on every 16
bit combining address (8bits) and data (8bits). After the 16
th
clock signal input following this data transfer input a load signal from the LD pin.
z
Input the load signal using an Active High pulse. The register address is set on the rising edge of the load pulse.
On the subsequent falling edge, the data are read as data of the mode of the register.
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| TB62710 | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:8BIT SHIFT REGISTER, LATCHES & CONSTANT CURRENT SOURCE DRIVERS |
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