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參數(shù)資料
| 型號： | TB1261F |
| 廠商： | Toshiba Corporation |
| 英文描述： | TOSHIBA BiCMOS INTEGRATED CIRCUIT, SILICON MONOLITHIC |
| 中文描述： | 東芝的BiCMOS集成電路，硅單片 |
| 文件頁數(shù)： | 6/66頁 |
| 文件大?。?/td> | 1544K |
| 代理商： | TB1261F |
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TB1261F/TB1262F
2002-6-30 6 / 66
6, DATA TRANSFER FORMAT VIA I2C BUS
Start and stop condition
Bit transfer
SDA
SCL
Start condition
Stop condition
S
P
Acknowledge
SDA
SCL
SDA stable
Change of SDA allowed
SDA by
transmitter
The receiver has to pull down the SDA line
(LOW) during the acknowledge clock pulse.
SDA by
receiver
SCL from
master
The transmitter releases the SDA line (HIGH)
during the acknowledge clock pulse.
S
Clock pulse for acknowledgment
9
8
1
Data transmit format 1
S
Slave address
Data transmit format 2
S
Slave address
Data received format
S
Slave address
1 A
Received data 01
A
A P
MSB
MSB
7bit
8bit
Received data 02
0 A
Sub address
A
A
Transmit data
P
MSB
S : Start condition
A : Acknowledge
MSB
MSB
P : Stop condition
7bit
8bit
8bit
0 A
Sub address
A
A
Transmit data 1
Sub address
A
A
Transmit data n
P
At the moment of the first acknowledge, the master transmitter becomes a master receiver and the slave receiver
becomes a slave transmitter. This acknowledge is still generated by the slave.
The Stop condition is generated by the master.
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